CY25100SCF Cypress Semiconductor Corp, CY25100SCF Datasheet - Page 3

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CY25100SCF

Manufacturer Part Number
CY25100SCF
Description
Manufacturer
Cypress Semiconductor Corp
Type
Programmable PLL Clock Generatorr
Datasheet

Specifications of CY25100SCF

Number Of Elements
1
Supply Current
35mA
Pll Input Freq (min)
8MHz
Pll Input Freq (max)
166MHz
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 70C
Package Type
SOIC
Output Frequency Range
3 to 200MHz
Operating Supply Voltage (min)
3.13V
Operating Supply Voltage (max)
3.45V
Operating Temperature Classification
Commercial
Pin Count
8
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY25100SCF
Manufacturer:
CY
Quantity:
762
Programming Description
Field Programmable CY25100
The CY25100 is programmed at the package level, that is, in a
programmer socket. The CY25100 is Flash based, so the parts
can be reprogrammed up to 100 times. This allows fast and easy
design changes and product updates, and eliminates any issues
with old and out-of-date inventory.
Samples and small prototype quantities can be programmed on
the CY3672 programmer with CY3690 (TSSOP) or CY3691
(SOIC) socket adapter.
CyberClocks™ Online Software
CyberClocks™ Online Software is a web based software appli-
cation that allows the user to custom-configure the CY25100. All
the parameters in
programmed into the CY25100. CyberClocks Online outputs an
industry-standard JEDEC file used for programming the
CY25100. CyberClocks Online is available at
sonline.com
the registration form and make sure to check the “non-standard
devices” box. For more information on the registration process
refer to CY3672 data sheet
For
programming solutions, contact your local Cypress sales repre-
sentative or Field Application Engineer (FAE).
CY3672 FTG Programming Kit and CY3690/CY3691
Socket Adapter
The Cypress CY3672 FTG programmer and CY3690 and
CY3691 socket adapters are required to program the CY25100.
The CY3690 enables users to program CY25100ZCF and
CY25100ZIF (TSSOP). CY3691 provides the ability to program
CY25100SCF and CY25100SIF (SOIC). Each socket adapter
comes with small prototype quantities of CY25100. The CY3690
and CY3691 is a separate orderable item, so the existing users
of the CY3672 FTG development kit or CY3672-PRG
programmer need to order only the socket adapters to program
the CY25100.
Factory Programmable CY25100
Factory programming is available for volume manufacturing by
Cypress. All requests must be submitted to the local Cypress
Field Application Engineer (FAE) or sales representative. A
sample request form (refer to “CY25100 Sample Request Form”
at www.cypress.com) must be completed. After the request is
processed, you will receive a new part number, samples, and
data sheet with the programmed values. This part number is
used for additional sample requests and production orders.
Additional information on the CY25100 can be obtained from the
Cypress web site at
Document #: 38-07499 Rev. *F
information
web site through user registration. To register, fill out
regarding
www.cypress.com.
Table 1
given as “Enter Data” can be
spread
spectrum
www.cyberclock-
software
Product Functions
Input Frequency (XIN, Pin 3 and XOUT, Pin 2)
The input to the CY25100 can be a crystal or a clock. The input
frequency range for crystals is 8 to 30 MHz, and for clock signals
is 8 to 166 MHz.
C
The load capacitors at Pin 1 (C
programmed from 12 pF to 60 pF with 0.5 pF increments. The
programmed value of these on-chip crystal load capacitors are
the same (XIN = XOUT = 12 to 60 pF).
The required values of C
following formula:
C
where C
manufacturer and C
For example, if a fundamental 16 MHz crystal with C
used and C
C
If using a driven reference, set C
value 12 pF.
Output Frequency, SSCLK Output (SSCLK, Pin 7)
The modulated frequency at the SSCLK output is produced by
synthesizing the input reference clock. The modulation can be
stopped by SSON# digital control input (SSON# = HIGH, no
modulation). If modulation is stopped, the clock frequency is the
nominal value of the synthesized frequency without modulation
(spread percentage = 0). The range of synthesized clock is from
3 to 200 MHz.
Spread Percentage (SSCLK, Pin 7)
The SSCLK spread can be programmed at any percentage value
from ±0.25% to ±2.5% for center spread and from –0.5% to
–5.0% down spread.
Reference Output (REFOUT, Pin 6)
The reference clock output has the same frequency and the
same phase as the input clock. This output can be programmed
to be enabled (clock on) or disabled (High-Z, clock off). If this
output is not required, it is recommended that users request the
disabled (High-Z, Clock Off) option.
Frequency Modulation
The frequency modulation is programmed at 31.5 kHz for all
SSCLK frequencies from 3 to 200 MHz. Contact the factory if a
higher modulation frequency is required.
Power Down or Output Enable (PD# or OE, Pin 4)
The part can be programmed to include either PD# or OE
function. PD# function powers down the oscillator and PLL. The
OE function disables the outputs.
XIN
XIN
XIN
= C
= C
and C
L
XOUT
XOUT
is the crystal load capacitor as specified by the crystal
P
XOUT
is 2 pF, C
= (2 x 16) – 2 = 30 pF
= 2C
(Pin 3 and Pin 2)
L
P
– C
is the parasitic PCB capacitance.
XIN
XIN
P
and C
and C
XIN
XOUT
XIN
XOUT
) and Pin 8 (C
and C
are calculated as:
are calculated using the
XOUT
to the minimum
CY25100
XOUT
Page 3 of 13
L
of 16 pF is
) can be
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