CY7C67300-100AI Cypress Semiconductor Corp, CY7C67300-100AI Datasheet - Page 60

• Manufacturer Part Number: CY7C67300-100AI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C67300-100AI

• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Operating Temperature (max): 85C
• Package Type: TQFP
• Rad Hardened: No
• Lead Free Status / Rohs Status: Not Compliant

HSS Transmit Address Register [0xC07C] [R/W]
Table 96. HSS Transmit Address Register
Register Description
The HSS Transmit Address register is used as the base pointer
address for the next HSS block transmit transfer.
HSS Transmit Counter Register [0xC07E] [R/W]
Table 97. HSS Transmit Counter Register
Register Description
The HSS Transmit Counter register designates the block byte
length for the next HSS transmit transfer. Load this register with
the word count minus one to start the block transmit transfer. As
each byte is transmitted this register value is decremented.
When read, this register indicates the remaining length of the
transfer.
Document #: 38-08015 Rev. *J
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
R/W
R/W
R/W
15
15
0
7
0
0
7
0
-
R/W
R/W
R/W
14
14
0
6
0
0
6
0
-
R/W
R/W
R/W
13
13
0
5
0
0
5
0
-
Reserved
R/W
R/W
R/W
12
12
0
4
0
0
4
0
-
Address...
...Address
...Counter
Address (Bits [15:0])
The Address field sets the base pointer address for the next HSS
block transmit transfer.
Counter (Bits [9:0])
The Counter field value is equal to the word count minus one
giving a maximum value of 0x03FF (1023) or 2048 bytes. When
the transfer is complete this register returns 0x03FF until
reloaded.
Reserved
Write all reserved bits with ’0’.
R/W
R/W
R/W
11
11
0
3
0
0
3
0
-
R/W
R/W
R/W
10
10
0
2
0
0
2
0
-
R/W
R/W
R/W
R/W
9
0
1
0
9
0
1
0
Counter...
CY7C67300
Page 60 of 99
R/W
R/W
R/W
R/W
8
0
0
0
8
0
0
0
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