CY7C67300-100AI Cypress Semiconductor Corp, CY7C67300-100AI Datasheet - Page 77
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CY7C67300-100AI
Manufacturer Part Number
CY7C67300-100AI
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C67300-100AI.pdf
(99 pages)
Specifications of CY7C67300-100AI
Operating Temperature (min)
-40C
Operating Temperature Classification
Industrial
Operating Temperature (max)
85C
Package Type
TQFP
Rad Hardened
No
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C67300-100AI
Manufacturer:
CYPRESS
Quantity:
745
PWM n Start Register [R/W]
■
■
■
■
Table 128. PWM n Start Register
Register Description
The PWM n Start register designates where in the window
defined by the PWM Maximum Count register to start the PWM
pulse for a supplied channel.
PWM n Stop Register [R/W]
■
■
■
■
Table 129. PWM n Stop Register
Register Description
The PWM n Stop register designates where in the window
defined by the PWM Maximum Count register to stop the PWM
pulse for a supplied channel.
Address (Bits [9:0])
The Address field designates when to stop the PWM pulse. If the
PWM Start value is equal to the PWM Stop value then the output
Document #: 38-08015 Rev. *J
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
Bit #
Field
Read/Write
Default
PWM 0 Start Register 0xC0EA
PWM 1 Start Register 0xC0EE
PWM 2 Start Register 0xC0F2
PWM 3 Start Register 0xC0F6
PWM 0 Stop Register 0xC0EC
PWM 1 Stop Register 0xC0F0
PWM 2 Stop Register 0xC0F4
PWM 3 Stop Register 0xC0F8
7
R/W
R/W
15
15
0
7
0
0
0
-
-
6
R/W
R/W
14
14
6
0
0
0
0
-
-
5
R/W
R/W
13
13
5
0
0
0
0
-
-
Reserved
Reserved
4
R/W
R/W
12
12
4
0
0
0
0
-
-
...Address
...Address
Address (Bits [9:0])
The Address field designates when to start the PWM pulse. If this
start value is equal to the Stop Count Value then the output stays
at false.
Reserved
Write all reserved bits with ’0’.
stays at ‘0’. If the PWM Stop value is greater then the PWM
Maximum Count value then the output stays at true.
Reserved
Write all reserved bits with ’0’.
3
R/W
R/W
11
11
0
3
0
0
0
-
-
2
R/W
R/W
10
10
0
2
0
0
0
-
-
1
R/W
R/W
R/W
R/W
1
0
9
0
9
0
0
Address...
Address...
CY7C67300
0
Page 77 of 99
R/W
R/W
R/W
R/W
0
0
8
0
8
0
0
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