AM29LV128MH123REI Spansion Inc., AM29LV128MH123REI Datasheet - Page 25

• Manufacturer Part Number: AM29LV128MH123REI
• Manufacturer: Spansion Inc.

Specifications of AM29LV128MH123REI

• Cell Type: NOR
• Density: 128Mb
• Access Time (max): 120ns
• Interface Type: Parallel
• Boot Type: Not Required
• Address Bus: 24/23Bit
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP
• Program/erase Volt (typ): 3/11.5 to 12.5V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 16M/8M
• Supply Current: 43mA
• Mounting: Surface Mount
• Pin Count: 56
• Lead Free Status / Rohs Status: Not Compliant

Hardware Data Protection
The command sequence requirement of unlock cycles
for programming or erasing provides data protection
against inadver tent writes (refer to
Table 11
lowing hardware data protection measures prevent ac-
cidental erasure or programming, which might
COMMON FLASH MEMORY INTERFACE (CFI)
The Common Flash Interface (CFI) specification out-
lines device and host system software interrogation
handshake, which allows specific vendor-specified
software algorithms to be used for entire families of
devices. Software support can then be device-inde-
pendent, JEDEC ID-independent, and forward- and
backward-compatible for the specified flash device
families. Flash vendors can standardize their existing
interfaces for long-term compatibility.
This device enters the CFI Query mode when the sys-
tem writes the CFI Query command, 98h, to address
55h, any time the device is ready to read array data.
The system can read CFI information at the addresses
given in
minate reading CFI data, the system must write the
reset command.
January 31, 2007 25270C7
Figure 3. Secured Silicon Sector Protect Verify
Table
for command definitions). In addition, the fol-
Write 40h to SecSi
Read from SecSi
Sector address
Sector address
A1 = 1, A0 = 0
A1 = 1, A0 = 0
Write 60h to
with A6 = 0,
any address
with A6 = 0,
RESET# =
V
Wait 1 μs
6,
START
IH
or V
Table
ID
7,
Table
Remove V
SecSi Sector is
SecSi Sector is
If data = 00h,
If data = 01h,
from RESET#
Protect Verify
SecSi Sector
8, and
unprotected.
Write reset
protected.
command
complete
IH
Table
or V
Table 10
ID
D A T A
9. To ter-
Am29LV128MH/L
and
S H E E T
otherwise be caused by spurious system level signals
during V
from system noise.
Low V
When V
cept any write cycles. This protects data during V
power-up and power-down. The command register
and all internal program/erase circuits are disabled,
and the device resets to the read mode. Subsequent
writes are ignored until V
system must provide the proper signals to the control
pins to prevent unintentional writes when V
greater than V
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE#
or WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# =
V
CE# and WE# must be a logical zero while OE# is a
logical one.
Power-Up Write Inhibit
If WE# = CE# = V
the device does not accept commands on the rising
edge of WE#. The internal state machine is automati-
cally reset to the read mode on power-up.
The system can also write the CFI query command
when the device is in the autoselect mode. The device
enters the CFI query mode, and the system can read
CFI data at the addresses given in
Table
command to return the device to reading array data.
For further information, please refer to the CFI Specifi-
cation and CFI Publication 100, available via the World
Wide Web at http://www.amd.com/flash/cfi. Alterna-
tively, contact an AMD representative for copies of
these documents.
IL
, CE# = V
8, and
CC
CC
CC
Write Inhibit
is less than V
power-up and power-down transitions, or
IH
Table
LKO
or WE# = V
.
IL
9. The system must write the reset
and OE# = V
LKO
CC
IH
, the device does not ac-
is greater than V
. To initiate a write cycle,
IH
during power up,
Table
6,
LKO
Table
. The
CC
25
CC
7,
is