LM9822CCWM National Semiconductor, LM9822CCWM Datasheet - Page 14
LM9822CCWM
Manufacturer Part Number
LM9822CCWM
Description
Manufacturer
National Semiconductor
Datasheet
1.LM9822CCWM.pdf
(22 pages)
Specifications of LM9822CCWM
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Operating Temperature (max)
70C
Package Type
SOIC W
Rad Hardened
No
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM9822CCWM
Manufacturer:
NS/国半
Quantity:
20 000
Company:
Part Number:
LM9822CCWMX
Manufacturer:
LATTIC
Quantity:
673
Power-Up Default Register Settings are shown in Bold Italics
Table 2: Configuration Register Parameters
(Data Output Edge)
Signal Polarity
(Power Down)
CDS (Enable)
Parameter
(Address)
I/O Mode
CDSREF
SMPCL
DOE
PD
(0)
(0)
(0)
(0)
(0)
(0)
(0)
B7
B6
B5
B4
B3
B2
B0
0
1
0
1
0
1
0
1
0
1
0
0
1
1
0
1
D7-D0 are clocked out (change) on the falling edge of MCLK - Recommended setting for
B1
0
1
0
1
Reference (for pixel N+1) sampled 1 MCLK cycle after signal (for pixel N) sampled
Reference (for pixel N+1) sampled 2 MCLK cycle after signal (for pixel N) sampled
Reference (for pixel N+1) sampled 3 MCLK cycle after signal (for pixel N) sampled
Reference (for pixel N+1) sampled 4 MCLK cycle after signal (for pixel N) sampled
Clamp is on between the reference and the signal sample points
Control Bits
D7-D0 are clocked out (change) on the rising edge of MCLK
Sample Mode (0)
Clamp is on for 1 MCLK before reference sampled
Reduced Slew Rate Output Driver Operation
lowest noise and best overall performance.
Negative Polarity (CCD) Clamping to V
Positive Polarity (CIS) Clamping to V
Normal Output Driver Operation
14
CDS Enabled (CCD)
Low Power Standby
CDS disabled (CIS)
Operating
REF-
REF+
Result
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