IS62LV256-70TI ISSI, Integrated Silicon Solution Inc, IS62LV256-70TI Datasheet - Page 7

SRAM 256K 32Kx8 70ns 3.3v

IS62LV256-70TI

Manufacturer Part Number
IS62LV256-70TI
Description
SRAM 256K 32Kx8 70ns 3.3v
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
Asynchronousr

Specifications of IS62LV256-70TI

Density
256Kb
Access Time (max)
70ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Address Bus
15b
Package Type
TSOP-I
Operating Temp Range
-40C to 85C
Number Of Ports
1
Supply Current
30mA
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.465V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
28
Word Size
8b
Number Of Words
32K
Memory Size
256 Kbit
Access Time
70 ns
Package / Case
TSOP I-28
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Maximum Operating Current
30 mA
Organization
32 K x 8
Interface
TTL
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IS62LV256-70TI
Manufacturer:
ISSI
Quantity:
20 000
AC WAVEFORMS
WRITE CYCLE NO. 1 (WE Controlled)
IS65LV256AL
IS62LV256AL
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. B
10/23/06
WRITE CYCLE SWITCHING CHARACTERISTICS
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write,
4. Tested with OE HIGH.
Symbol
t
t
t
t
t
t
t
t
t
t
output loading specified in Figure 1.
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the Write.
wc
sce
aw
ha
sa
Pwe
sd
hd
hzwe
lzwe
(4)
(2)
ADDRESS
(2)
D
Parameter
Write Cycle Time
CE to Write End
Address Setup Time to Write End
Address Hold from Write End
Address Setup Time
WE Pulse Width
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
OUT
WE
D
CE
IN
t
DATA UNDEFINED
SA
(1,2)
t
AW
t
HZWE
Min.
t
1-800-379-4774
SCE
20
15
14
14
13
0
0
0
0
-20 ns
t
WC
t
PWE
HIGH-Z
(1,3)
Max.
8
(Over Operating Range)
t
SD
DATA-IN VALID
Min.
45
35
25
25
20
0
0
0
0
-45 ns
t
HA
t
t
LZWE
HD
Max.
20
Unit
ns
ns
ns
ns
ns
ns
ns
n s
ns
ns
7

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