P87C51MC2BA NXP Semiconductors, P87C51MC2BA Datasheet - Page 10

• Manufacturer Part Number: P87C51MC2BA
• Manufacturer: NXP Semiconductors

Specifications of P87C51MC2BA

• Cpu Family: 87C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 24MHz
• Interface Type: SPI/UART
• Program Memory Type: EPROM
• Program Memory Size: 96KB
• Total Internal Ram Size: 3KB
• # I/os (max): 34
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PLCC
• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
8. Functional description
9397 750 12302
Product data
8.1 Memory arrangement
8.2 Special Function Registers
P87C51MB2 has 64 kbytes of OTP (MX universal map range: 80:0000-80:FFFF),
while P87C51MC2 has 96 kbytes of OTP (MX universal map range:
80:0000-81:7FFF).
The P87C51MB2 and P87C51MC2 have 2 kbytes and 3 kbytes of on-chip RAM
respectively:
Table 3:
For more detailed information, please refer to the P87C51Mx2 User Manual or the
51MX Architecture Specification .
Special Function Register (SFR) accesses are restricted in the following ways:
Data memory
Type
DATA
IDATA
EDATA
XDATA
•
•
•
User must not attempt to access any SFR locations not defined.
Accesses to any defined SFR locations must be strictly for the functions for the
SFRs.
SFR bits labeled ‘-’, ‘0’, or ‘1’ can only be written and read as follows:
– ‘-’ MUST be written with ‘0’, but can return any value when read (even if it was
– ‘0’ MUST be written with ‘0’, and will return a ‘0’ when read.
– ‘1’ MUST be written with ‘1’, and will return a ‘1’ when read.
written with ‘0’). It is a reserved bit and may be used in future derivatives.
Description
memory that can be addressed both
directly and indirectly; can be used as
stack
superset of DATA; memory that can
be addressed indirectly (where direct
address for upper half is for SFR
only); can be used as stack
superset of DATA/IDATA; memory that
can be addressed indirectly using
Universal Pointers (PR0,1); can be
used as stack
memory (on-chip ‘External Data’) that
is accessed via the MOVX/EMOV
instructions using DPTR/EPTR
Memory arrangement
Rev. 03 — 13 November 2003
P87C51MB2/P87C51MC2
Size (bytes) and MX universal memory
map range
P87C51MB2
128
(7F:0000-7F:007F)
256
(7F:0000-7F:00FF)
512
(7F:0000-7F:01FF)
1536
(00:0000-00:05FF)
80C51 8-bit microcontroller family
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
P87C51MC2
128
(7F:0000-7F:001F)
256
(7F:0000-7F:00FF)
512
(7F:0000-7F:01FF)
2560
(00:0000-00:09FF)
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