P87C51MC2BA NXP Semiconductors, P87C51MC2BA Datasheet - Page 9

• Manufacturer Part Number: P87C51MC2BA
• Manufacturer: NXP Semiconductors

Specifications of P87C51MC2BA

• Cpu Family: 87C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 24MHz
• Interface Type: SPI/UART
• Program Memory Type: EPROM
• Program Memory Size: 96KB
• Total Internal Ram Size: 3KB
• # I/os (max): 34
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 44
• Package Type: PLCC
• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
Table 2:
9397 750 12302
Product data
Symbol
RST
ALE
PSEN
EA/V
XTAL1
XTAL2
V
V
(NC/V
(NC/V
SS
DD
PP
SS
DD
)
)
Pin description
Pin
34
10
33
32
35
21
20
22
44
1
23
…continued
Type
O
I/O
I
O
O
I
I
O
I
I
I
I
Description
Reset: A HIGH on this pin for two machine cycles, while the oscillator is
running, resets the device. An internal diffused resistor to V
power-on reset using only an external capacitor to V
Address Latch Enable: Output pulse for latching the LOW byte of the address
during an access to external memory. In normal operation, ALE is emitted at a
constant rate of
or clocking. Note that one ALE pulse is skipped during each access to external
data memory. ALE can be disabled by setting SFR AUXR.0. With this bit is set,
ALE will be active only during a MOVX/EMOV/MOVC instruction.
Program Store Enable: The read strobe to external program memory. When
executing code from the external program memory, PSEN is activated twice
each machine cycle, except that two PSEN activations are skipped during each
access to external data memory. PSEN is not activated during fetches from
internal program memory.
External Access Enable/Programming Supply Voltage: EA must be
externally held LOW to enable the device to fetch code from external program
memory locations. If EA is held HIGH, the device executes from internal
program memory. The value on the EA pin is latched when RST is released and
any subsequent changes have no effect.
Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock
generator circuits.
Crystal 2: Output from the inverting oscillator amplifier.
Ground: 0 V reference.
Power Supply: This is the power supply voltage for normal operation as well as
Idle and Power Down modes.
No Connect/Ground: This pin is internally connected to V
P87C51MB2/MC2. If connected externally, this pin must only be connected to
the same V
pins is not required. However, they may be connected in addition to the primary
V
and improve system-level EMI characteristics.)
No Connect/Power Supply: This pin is internally connected to V
P87C51MB2/MC2. If connected externally, this pin must only be connected to
the same V
pins is not required. However, they may be connected in addition to the primary
V
and improve system-level EMI characteristics.)
•
•
SS
SS
P4.1, TXD1
SS
– Serial output port 1 (with pull-up on pin)
– SPI Slave Select (Selected when SPEN (SPCTL.6) is ‘1’, in which case
and V
and V
Rev. 03 — 13 November 2003
the pull-up for this pin is disabled)
DD
DD
SS
DD
pins to improve power distribution, reduce noise in output signals,
pins to improve power distribution, reduce noise in output signals,
as at pin 22. (Note: Connecting the second pair of V
as at pin 44. (Note: Connecting the second pair of V
1
6
the oscillator frequency, and can be used for external timing
P87C51MB2/P87C51MC2
80C51 8-bit microcontroller family
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
DD
.
SS
SS
on the
permits a
DD
SS
SS
on the
and V
and V
9 of 36
DD
DD