ICS8430AY-61 IDT, Integrated Device Technology Inc, ICS8430AY-61 Datasheet - Page 10

• Manufacturer Part Number: ICS8430AY-61
• Manufacturer: IDT, Integrated Device Technology Inc
• Type: PLL Frequency Synthesizerr

Specifications of ICS8430AY-61

• Number Of Elements: 1
• Supply Current: 155mA
• Pll Input Freq (min): 14MHz
• Pll Input Freq (max): 27MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: LQFP
• Output Frequency Range: 20.83 to 500MHz
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Pin Count: 32
• Lead Free Status / Rohs Status: Not Compliant

LVCMOS
The XTAL_IN input can accept a single-ended LVCMOS signal
through an AC coupling capacitor. A general interface diagram
is shown in Figure 4. The XTAL_OUT pin can be left floating.
The input edge rate can be as slow as 10ns. For LVCMOS
inputs, it is recommended that the amplitude be reduced from
full swing to half swing in order to prevent signal interference
with the power rail and to reduce noise. This configuration
requires that the output impedance of the driver (Ro) plus the
8430AY-61
R
I
C
For applications not requiring the use of the crystal oscillator
input, both XTAL_IN and XTAL_OUT can be left floating.
Though not required, but for additional protection, a 1kΩ
resistor can be tied from XTAL_IN to ground.
TEST_CLK I
For applications not requiring the use of the test clock, it can
be left floating. Though not required, but for additional
protection, a 1kΩ resistor can be tied from the TEST_CLK to
ground.
LVCMOS C
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
NPUTS
RYSTAL
ECOMMENDATIONS FOR
:
I
NPUT
ONTROL
NPUT
:
TO
XTAL I
:
P
INS
:
F
NTERFACE
IGURE
U
NUSED
VDD
4. G
Ro
ENERAL
I
NPUT AND
D
IAGRAM FOR
Rs
Zo = Ro + Rs
O
UTPUT
www.idt.com
Zo = 50
500MH
LVCMOS D
P
10
INS
series resistance (Rs) equals the transmission line
impedance. In addition, matched termination at the crystal
input will attenuate the signal in half. This can be done in one
of two ways. First, R1 and R2 in parallel should equal the
transmission line impedance. For most 50Ω applications, R1
and R2 can be 100Ω. This can also be accomplished by
removing R1 and making R2 50Ω.
O
TEST O
The unused TEST output can be left floating. There should
be no trace attached.
LVPECL O
All unused LVPECL outputs can be left floating. We
recommend that there is no trace attached. Both sides of the
differential output pair should either be left floating or
terminated.
UTPUTS
VDD
Z
RIVER TO
, C
R1
R2
UTPUT
RYSTAL
:
LVPECL F
.1uf
UTPUT
:
XTAL I
XTAL_IN
XTAL_OUT
-
TO
NPUT
-3.3V, 2.5V D
I
NTERFACE
REQUENCY
ICS8430-61
S
IFFERENTIAL
YNTHESIZER
REV. D JULY 27, 2010