TDA9886TS NXP Semiconductors, TDA9886TS Datasheet - Page 14

• Manufacturer Part Number: TDA9886TS
• Manufacturer: NXP Semiconductors

Specifications of TDA9886TS

• Lead Free Status / Rohs Status: Not Compliant

NXP Semiconductors
TDA9885_TDA9886_3
Product data sheet
9.2.4 Data byte for data mode (E data)
Table 12.
[1]
Table 13.
[1]
Table 14.
[1]
Bit
C4
0
0
0
0
0
0
Bit
7
6
5
4 to 2
1 and 0
Function
Pin OP1
Pin OP2
Gain
For 0 dB refer to
For positive modulation choose 6.5 MHz.
The corresponding port function has to be disabled (set to ‘high-impedance’); see
note 12
of
Tuner takeover point adjustment bits
Bit description of SAD register for data mode (SAD = 10)
Options in extended TV mode; bit B3 = 0 of SAD 00 register
Symbol
E7
E6
E5
E[4:2]
E[1:0]
Bit E7 = 0
Bit E5 = 0
port function
port function
normal gain
Table
C3
0
0
0
0
0
0
I
2
C-bus controlled multistandard alignment-free IF-PLL demodulators
20.
Section 12
Rev. 03 — 16 December 2008
Description
VIF AGC and port features; dependent on bit E5; see
L standard PLL gating
VIF, SIF and tuner minimum gain; dependent on bit E7; see
vision intermediate frequency selection; see
sound intercarrier frequency selection (sound 2nd IF)
1 = gating in case of 36 % positive modulation
0 = gating in case of 0 % positive modulation
00 = f
01 = f
10 = f
11 = f
C2
1
1
0
0
0
0
Bit E5 = 1
port function
port function
minimum gain
symbol QV
FM
FM
FM
FM
= 4.5 MHz
= 5.5 MHz
= 6.0 MHz
= 6.5 MHz
TOP
.
C1
0
0
1
1
0
0
[1]
Bit E7 = 1
Bit E5 = 0
port function
VIF-AGC output
normal gain
…continued
TDA9885; TDA9886
C0
1
0
1
0
1
0
[1]
Bit E5 = 1
VIF-AGC external input
port function
external gain
Table 15
TOP adjustment (dB)
11
12
13
14
15
16
Table 10
© NXP B.V. 2008. All rights reserved.
Table 14
Table 14
and
Table
19 of 56
[1]