TDA5252XT Infineon Technologies, TDA5252XT Datasheet - Page 54

• Manufacturer Part Number: TDA5252XT
• Manufacturer: Infineon Technologies

Specifications of TDA5252XT

• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Operating Temperature Classification: Industrial
• Product Depth (mm): 4.4mm
• Product Length (mm): 9.7mm
• Operating Supply Voltage (min): 2.1V
• Operating Supply Voltage (max): 5.5V
• Lead Free Status / Rohs Status: Compliant

To compensate frequency errors due to crystal and component tolerance C
be varied. To enable this correction, half of the necessary capacitance variation has to be realized
with the internal C-banks.
If no finetuning is intended it is recommended to leave XIN (Pin 21) open. So the parasitic
capacitance of Pin 21 has no effect.
Note: Please keep in mind also to include the Pad parasitics of the circuit board.
In the suitable range for the serial capacitor, either capacitors with a tolerance of 0.1pF or 1% are
available.
A spreadsheet, which can be used to predict the total frequency error by simply entering the crystal
specification, may be obtained from Infineon.
3.2.5
The FSK-switch can be used either in a bipolar or in a FET mode. The mode of this switch is
controlled by bit D0 of the XTAL_CONFIG register (subaddress 0EH).
In the bipolar mode the FSK-switch can be controlled by a ramp function. This ramp function is set
by the bits D1 and D2 of the XTAL_CONFIG register (subadress 0EH). With these modes of the
FSK-switch the bandwidth of the FSK spectrum can be influenced.
When working in the FET mode the power consumption can be reduced by about 200 µ A.
The default mode is bipolar switch with no ramp function (D0 = 1, D1 = D2 = 0), which is suitable
for all bitrates.
Table 3-3
Data Sheet
FSK_RX:
-FSK:
+FSK:
D0
0
1
1
1
1
n.a.
D1
0
1
0
1
FSK-switch modes
Sub Address 0EH: XTAL_CONFIG
C
C
C
v1
v2
v3
n.a.
D2
0
0
1
1
+
+
+
C
C
C
tune1
tune2
tune2
bipolar (default)
Switch mode
=
=
=
bipolar
bipolar
bipolar
C
(
--------------------------------------------------------------------- - C
(
------------------------------------------------------------------------ - C
(
FET
C
(
C
v-
C
C
v1
v1
v1
v1
–
+
+
C
+
+
C
21
C
C
C
tune1
tune1
tune1
tune1
)
54
) C
)
)
–
⋅
–
(
⋅
(
C
(
(
C
C
v+
v+
vm
Ramp time
vm
–
< 0.2 µ s
–
< 0.2 µ s
12 µ s
–
C
–
C
4 µ s
8 µ s
C
21
21
C
21
21
)
)
–
)
)
–
20
20
–
C
v1
v2
> 32 kBit/s NRZ
> 32 kBit/s NRZ
, C
32 kBit/s NRZ
16 kBit/s NRZ
12 kBit/s NRZ
Max. Bitrate
–
v2
C
TDA5252 G2
and C
22
Version 1.1
Application
2007-02-26
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