TDA18271HD/C2.557 NXP Semiconductors, TDA18271HD/C2.557 Datasheet - Page 15
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TDA18271HD/C2.557
Manufacturer Part Number
TDA18271HD/C2.557
Description
Manufacturer
NXP Semiconductors
Datasheet
1.TDA18271HDC2.557.pdf
(70 pages)
Specifications of TDA18271HD/C2.557
Lead Free Status / Rohs Status
Compliant
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Table 12.
Legend: * power-on reset value.
TDA18271HD_4
Product data sheet
Address Register Bit
03h
02h
EP1
PL
PL - Power level (address 02h and 03h) bit description
9.3.4 Description of power level byte (read mode)
9.3.5 Description of Easy prog byte 1
7
7
6 to 5 POWER_LEVEL[6:5] R
4 to 0 POWER_LEVEL[4:0] R
There are 9 power level bits sent in power level bytes 2 and 3. They indicate the
composite voltage gain of the LNA, the loaded attenuator voltage gains, and the level at
the input of the RF AGC.
Table 13.
Legend: * power-on reset value.
Bit
7
6
5
4
Symbol
POWER_LEVEL[8]
POWER_LEVEL[7]
Symbol
POWER_LEVEL[8]
DIS_POWER_LEVEL R/W
-
RF_CAL_OK
EP1 - Easy prog byte 1 (subaddress 03h) bit description
Rev. 04 — 19 May 2009
Access Value
R
Access Value Description
R
R/W
R/W
00
01
10
11
00
01
10
11
0 0000
0 0001
...
1 1110
1 1111
1*
0
0*
1
0*
Description
AGC2 gain, attenuator voltage gain including load,
the attenuator load is 50
of 6 dB)
AGC1 gain, LNA voltage gain, the LNA voltage gain
assumes a 75
impedance
sensed level at the input of the RF AGC, detector
slope is 1 dB/step
6 dB
9 dB
12 dB
15 dB
103 dB V (RMS value)
102 dB V (RMS value)
...
73 dB V (RMS value)
72 dB V (RMS value)
15 dB
12 dB
9 dB
6 dB
see
power level disabled
power level enabled
must be set to 0
RF tracking filter calibration procedure (see
Section
is started
successful
not successful
Table 12
9.4.9); updated each time the procedure
source impedance and a low output
TDA18271HD
(allows the maximum gain
© NXP B.V. 2009. All rights reserved.
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