74LVC595APW NXP Semiconductors, 74LVC595APW Datasheet - Page 4

Counter Shift Registers 3.3V 8 SHIFT REG OTPT LATCH 3S

74LVC595APW

Manufacturer Part Number
74LVC595APW
Description
Counter Shift Registers 3.3V 8 SHIFT REG OTPT LATCH 3S
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC595APW

Counting Sequence
Serial to Serial/Parallel
Number Of Circuits
1
Package / Case
SOT-403
Logic Family
LVC
Logic Type
CMOS
Output Type
3-State
Propagation Delay Time
4.7 ns, 4 ns
Supply Voltage (max)
3.6 V
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Function
Shift Register
Mounting Style
SMD/SMT
Operating Supply Voltage
1.8 V, 2.5 V, 3.3 V
Lead Free Status / Rohs Status
 Details
Other names
74LVC595APW,112
NXP Semiconductors
6. Pinning information
Table 2.
74LVC595A_1
Product data sheet
Symbol
Q[0:7]
GND
Q7S
MR
SHCP
STCP
OE
DS
V
Fig 5. Pin configuration SO16 and TSSOP16
CC
GND
Pin description
Q1
Q2
Q3
Q4
Q5
Q6
Q7
1
2
3
4
5
6
7
8
Pin
15, 1, 2, 3, 4, 5, 6, 7 parallel data output
8
9
10
11
12
13
14
16
6.1 Pinning
6.2 Pin description
74LVC595A
001aaf569
Description
ground (0 V)
serial data output
master reset (active LOW)
shift register clock input
storage register clock input
output enable input (active LOW)
serial data input
supply voltage
16
15
14
13
12
11
10
9
V
Q0
DS
OE
STCP
SHCP
MR
Q7S
CC
Rev. 01 — 29 May 2007
8-bit serial-in/serial-out or parallel-out shift register; 3-state
Fig 6. Pin configuration DHVQFN16
index area
terminal 1
Q2
Q3
Q4
Q5
Q6
Q7
Transparent top view
2
3
4
5
6
7
74LVC595A
74LVC595A
15
14
13
12
11
10
© NXP B.V. 2007. All rights reserved.
001aaf570
Q0
DS
OE
STCP
SHCP
MR
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