ispLSI2032-80LJ Lattice, ispLSI2032-80LJ Datasheet - Page 10

• Manufacturer Part Number: ispLSI2032-80LJ
• Description: CPLD - Complex Programmable Logic Devices USE ispMACH 4000V
• Manufacturer: Lattice

Specifications of ispLSI2032-80LJ

• Number Of Macrocells: 32
• Maximum Operating Frequency: 84 MHz
• Delay Time: 18.5 ns
• Number Of Programmable I/os: 32
• Operating Supply Voltage: 4.75 V to 5.25 V
• Supply Current: 40 mA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Package / Case: PLCC-48
• Mounting Style: SMD/SMT
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 4.75 V
• Lead Free Status / Rohs Status: No

Power consumption in the ispLSI 2032 and 2032A de-
vices depends on two primary factors: the speed at which
the device is operating and the number of Product Terms
Figure 4. Typical Device Power Consumption vs fmax
I CC can be estimated for the ispLSI 2032/A using the following equation:
For 2032/A -150, -180: I CC (mA) = 30 + (# of PTs * 0.46) + (# of nets * Max freq * 0.012)
For 2032/A -135, -110, -80: I CC (mA) = 21 + (# of PTs * 0.30) + (# of nets * Max freq * 0.012)
Where:
The I CC estimate is based on typical conditions (V CC = 5.0V, room temperature) and an assumption of two GLB loads
on average exists. These values are for estimates only. Since the value of I CC is sensitive to operating conditions
and the program in the device, the actual I CC should be verified.
Power Consumption
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max freq = Highest Clock Frequency to the device (in MHz)
120
110
100
90
80
70
60
50
40
1
20
ispLSI 2032/A (-150, -180)
Notes: Configuration of Two 16-bit Counters
40
Typical Current at 5V, 25° C
60
10
f
max (MHz)
used. Figure 4 shows the relationship between power
and operating speed.
80
ispLSI 2032/A (-80, -110, -135)
Specifications ispLSI 2032/A
100 120 140 160 180
0127A/2032A