CY7C037V-25AC Cypress Semiconductor Corp, CY7C037V-25AC Datasheet - Page 9

• Manufacturer Part Number: CY7C037V-25AC
• Description: SRAM Chip Async Dual 3.3V 576K-Bit 32K x 18 25ns 100-Pin TQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C037V-25AC

• Package: 100TQFP
• Timing Type: Asynchronous
• Density: 576 Kb
• Typical Operating Supply Voltage: 3.3 V
• Address Bus Width: 15 Bit
• Number Of I/o Lines: 18 Bit
• Number Of Ports: 2
• Number Of Words: 32K

Document #: 38-06078 Rev. *A
Switching Waveforms
Read Cycle No. 3 (Either Port)
Read Cycle No. 2 (Either Port CE/OE Access)
Read Cycle No. 1 (Either Port Address Access)
CURRENT
Notes:
DATA OUT
20. R/W is HIGH for read cycles.
21. Device is continuously selected CE = V
22. OE = V
23. Address valid prior to or coincident with CE transition LOW.
24. To access RAM, CE = V
ADDRESS
DATA OUT
ADDRESS
DATA OUT
UB or LB
LB or UB
CE and
CE
IL
I
OE
I
CC
SB
.
PREVIOUS DATA VALID
IL
, UB or LB = V
t
OHA
[20, 22, 23, 24]
IL
IL
, SEM = V
t
and UB or LB = V
AA
t
PU
t
AA
IH
t
t
. To access semaphore, CE = V
LZCE
LZCE
t
LZCE
[20, 23, 24]
t
t
ACE
ABE
IL
[20, 21, 22]
. This waveform cannot be used for semaphore reads.
t
LZOE
t
t
RC
ACE
t
RC
t
DOE
IH
, SEM = V
IL
.
DATA VALID
DATA VALID
t
OHA
CY7C027V/028V
CY7C037V/038V
t
t
t
OHA
HZCE
PD
t
t
t
HZOE
HZCE
HZCE
Page 9 of 18