P87C554SBAA NXP Semiconductors, P87C554SBAA Datasheet - Page 6

• Manufacturer Part Number: P87C554SBAA
• Description: MCU 8-Bit 87C 80C51 CISC 16KB EPROM 5V 68-Pin PLCC Tube
• Manufacturer: NXP Semiconductors

Specifications of P87C554SBAA

• Package: 68PLCC
• Device Core: 80C51
• Family Name: 87C
• Maximum Speed: 16 MHz
• Ram Size: 512 Byte
• Program Memory Size: 16 KB
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Program Memory Type: EPROM
• Number Of Programmable I/os: 40
• Interface Type: I2C/UART
• On-chip Adc: 7-chx10-bit
• Operating Temperature: 0 to 70 °C
• Number Of Timers: 3

1. To avoid “latch-up” effect at power-on, the voltage on any pin at any time must not be higher or lower than V
Philips Semiconductors
PIN DESCRIPTION (Continued)
NOTE:
2003 Jan 28
P4.0-P4.7
P5.0-P5.6
RST
XTAL1
XTAL2
V
PSEN
ALE/PROG
EA/V
AV
AV
AV
AV
SS
80C51 8-bit microcontroller – 6-clock operation
16K/512 OTP/ROMless, 7 channel 10 bit A/D, I
high I/O, 64L LQFP
MNEMONIC
respectively.
REF–
REF+
SS
DD
PP
PIN NO.
LQFP
14–21
14–19
20, 21
41–42
2–8
22
40
39
51
52
53
62
63
64
1
TYPE
I/O
I/O
O
O
O
O
O
I
I
I
I
I
I
I
I
Port 4: 8-bit programmable I/O port. Alternate functions include:
CMSR0-CMSR5 (P4.0-P4.5): Timer T2 compare and set/reset outputs on a match with timer T2.
CMT0, CMT1 (P4.6, P4.7): Timer T2 compare and toggle outputs on a match with timer T2.
Port 4 has four modes selected on a per bit basis by writing to the P4M1 and P4M2 registers as
follows:
Port 5: 8-bit input port.
ADC0-ADC7 (P5.0-P5.7): Alternate function: Seven input channels to the ADC.
Reset: Input to reset the 87C554. It also provides a reset pulse as output when timer T3 overflows.
Crystal Input 1: Input to the inverting amplifier that forms the oscillator, and input to the internal
clock generator. Receives the external clock signal when an external oscillator is used.
Crystal Input 2: Output of the inverting amplifier that forms the oscillator. Left open-circuit when an
external clock is used.
Digital ground.
Program Store Enable: Active-low read strobe to external program memory.
Address Latch Enable: Latches the low byte of the address during accesses to external memory.
It is activated every six oscillator periods. During an external data memory access, one ALE pulse
is skipped. ALE can drive up to eight LS TTL inputs and handles CMOS inputs without an external
pull-up. This pin is also the program pulse input (PROG) during EPROM programming.
External Access: When EA is held at TTL level high, the CPU executes out of the internal program
ROM provided the program counter is less than 16,384. When EA is held at TTL low level, the CPU
executes out of external program memory. EA is not allowed to float. This pin also receives the
12.75 V programming supply voltage (V
Analog to Digital Conversion Reference Resistor: Low-end.
Analog to Digital Conversion Reference Resistor: High-end.
Analog Ground
Analog Power Supply
P4M1.x
0
0
1
1
P4M2.x
0
1
0
1
2
C, PWM, capture/compare,
6
Mode Description
Pseudo-bidirectional (standard c51 configuration; default)
Push-Pull
High impedance
Open drain
NAME AND FUNCTION
PP
) during EPROM programming.
DD
+ 0.5 V or V
80C554/87C554
SS
– 0.5 V,
Product data