DS21Q55N Maxim Integrated Products, DS21Q55N Datasheet - Page 140

• Manufacturer Part Number: DS21Q55N
• Description: Framer E1/J1/T1 3.3V 256-Pin BGA
• Manufacturer: Maxim Integrated Products

Specifications of DS21Q55N

• Package: 256BGA
• Number Of Transceivers: 4
• Standard Framing Format: E1|J1|T1
• Maximum Supply Current: 75(Typ) mA
• Minimum Single Supply Voltage: 3.135 V
• Maximum Single Supply Voltage: 3.465 V

Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bit 0/Transmit FIFO Not Full Condition (TNF)
Bit 1/Transmit FIFO Below Low-Watermark Condition (TLWM)
Bit 2/Receive FIFO Not Empty Condition (RNE)
Bit 3/Receive FIFO Above High-Watermark Condition (RHWM)
Bit 4/Receive Packet-Start Event (RPS)
Bit 5/Receive Packet-End Event (RPE)
Bit 6/Transmit Message-End Event (TMEND)
0 = interrupt masked
1 = interrupt enabled—interrupts on rising edge only
0 = interrupt masked
1 = interrupt enabled—interrupts on rising edge only
0 = interrupt masked
1 = interrupt enabled—interrupts on rising edge only
0 = interrupt masked
1 = interrupt enabled—interrupts on rising edge only
0 = interrupt masked
1 = interrupt enabled
0 = interrupt masked
1 = interrupt enabled
0 = interrupt masked
1 = interrupt enabled
—
7
0
TMEND
IMR6, IMR7
HDLC # 1 Interrupt Mask Register 6
HDLC # 2 Interrupt Mask Register 7
21h, 23h
6
0
RPE
5
0
RPS
4
0
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RHWM
0
3
RNE
2
0
TLWM
1
0
TNF
0
0