DS21Q55N Maxim Integrated Products, DS21Q55N Datasheet - Page 190
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DS21Q55N
Manufacturer Part Number
DS21Q55N
Description
Framer E1/J1/T1 3.3V 256-Pin BGA
Manufacturer
Maxim Integrated Products
Datasheet
1.DS21Q55N.pdf
(237 pages)
Specifications of DS21Q55N
Package
256BGA
Number Of Transceivers
4
Standard Framing Format
E1|J1|T1
Maximum Supply Current
75(Typ) mA
Minimum Single Supply Voltage
3.135 V
Maximum Single Supply Voltage
3.465 V
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27.
The extended system information bus (ESIB) allows two DS21Q55s to share an 8-bit CPU bus for
reporting alarms and interrupt status as a group. With a single bus read, the host can be updated with
alarm or interrupt status from all members of the group. There are two control registers (ESIBCR1 and
ESIBCR2) and four information registers (ESIB1, ESIB2, ESIB3, and ESIB4). For example, two
DS21Q55s can be grouped into an ESIB group. A single read of the ESIB1 register of any member of the
group yields the interrupt status of all eight ports of the two DS21Q55s. Therefore, the host can determine
which device or devices are causing an interrupt without polling all eight devices. Through ESIB2, the
host can gather synchronization status on all members of the group. ESIB3 and ESIB4 can be
programmed to report various alarms on a device-by-device basis.
There are three device pins involved in forming an ESIB group: ESIBS0, ESIBS1, and ESIBRD. A 10kΩ
pullup resistor must be provided on ESIBS0, ESIBS1, and ESIBRD.
Figure 27-1. ESIB Group of Two DS21Q55s
EXTENDED SYSTEM INFORMATION BUS (ESIB)
CPU I/F
CPU I/F
DS21Q55 # 2
DS21Q55 # 1
ESIBRD
ESIBRD
ESIB1
ESIB0
ESIB0
ESIB1
190 of 237
V
DD
10kOhm (3)
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