HEF4093BPN NXP Semiconductors, HEF4093BPN Datasheet - Page 2

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HEF4093BPN

Manufacturer Part Number
HEF4093BPN
Description
NAND Gate 4-Element 2-IN CMOS 14-Pin PDIP Bulk
Manufacturer
NXP Semiconductors
Datasheet

Specifications of HEF4093BPN

Package
14PDIP
Logic Function
NAND
Input Type
Schmitt Trigger
Minimum Operating Supply Voltage
3 V
Maximum Operating Supply Voltage
15 V
Maximum Propagation Delay Time @ Maximum Cl
185@5V|80@10V|60@15V ns
Operating Temperature
-40 to 125 °C
Dc
07+
NXP Semiconductors
5. Functional diagram
6. Pinning information
HEF4093B
Product data sheet
Fig 1.
Fig 3.
Functional diagram
Pin configuration
1A
1B
2A
2B
3A
3B
4A
4B
6.1 Pinning
1
2
5
6
8
9
12
13
001aag104
10
11
3
4
All information provided in this document is subject to legal disclaimers.
1Y
2Y
3Y
4Y
V
Rev. 7 — 1 September 2010
1A
1B
1Y
2Y
2A
2B
SS
1
2
3
4
5
6
7
HEF4093B
001aag106
Fig 2.
14
13
12
11
10
9
8
V
4B
4A
4Y
3Y
3B
3A
Logic diagram (one gate)
DD
nA
nB
Quad 2-input NAND Schmitt trigger
HEF4093B
© NXP B.V. 2010. All rights reserved.
001aag105
nY
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