HEF4093BPN NXP Semiconductors, HEF4093BPN Datasheet - Page 6

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HEF4093BPN

Manufacturer Part Number
HEF4093BPN
Description
NAND Gate 4-Element 2-IN CMOS 14-Pin PDIP Bulk
Manufacturer
NXP Semiconductors
Datasheet

Specifications of HEF4093BPN

Package
14PDIP
Logic Function
NAND
Input Type
Schmitt Trigger
Minimum Operating Supply Voltage
3 V
Maximum Operating Supply Voltage
15 V
Maximum Propagation Delay Time @ Maximum Cl
185@5V|80@10V|60@15V ns
Operating Temperature
-40 to 125 °C
Dc
07+
NXP Semiconductors
12. Waveforms
Table 9.
Table 10.
HEF4093B
Product data sheet
Supply voltage
V
5 V to 15 V
Supply voltage
V
5 V to 15 V
Fig 4.
Fig 5.
DD
DD
Measurement points are given in
Logic levels: V
t
Propagation delay and output transition time
Test data given in
Definitions for test circuit:
DUT = Device Under Test.
C
R
Test circuit
r
, t
L
T
Measurement points
Test data
f
= load capacitance including jig and probe capacitance.
= termination resistance should be equal to the output impedance Z
= input rise and fall times.
OL
and V
Table
Input
V
V
OH
10.
I
SS
are typical output voltage levels that occur with the output load.
or V
output
DD
input
Table
Input
V
0.5V
All information provided in this document is subject to legal disclaimers.
G
M
V
V
0 V
OH
OL
9.
V
DD
I
V
10 %
Rev. 7 — 1 September 2010
I
90 %
R T
V
90 %
M
DUT
V
t
r
V
DD
10 %
M
t
PHL
t
t
≤ 20 ns
THL
r
, t
f
V
O
C L
o
of the pulse generator.
001aag182
t
f
001aag197
t
PLH
t
TLH
Quad 2-input NAND Schmitt trigger
V
0.5V
Output
M
DD
Load
C
50 pF
L
HEF4093B
© NXP B.V. 2010. All rights reserved.
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