MT90869AG Zarlink, MT90869AG Datasheet - Page 56

• Manufacturer Part Number: MT90869AG
• Description: Switch Fabric 16K x 16K/8K x 8K 1.8V/3.3V 272-Pin BGA Tray
• Manufacturer: Zarlink

Specifications of MT90869AG

• Package: 272BGA
• Number Of Ports: 64
• Fabric Size: 16K x 16K|8K x 8K
• Switch Core: Non-Blocking|Blocking
• Port Speed: 8.192|4.096|2.048 Mbps
• Operating Supply Voltage: 1.8|3.3 V

13.4.1
These eight bits define the delay, in channel numbers, the serial interface receiver take to store the channel data
from the Local stream input pins. The input channel delay can be selected to 255 (16 Mb/s streams), 127 (8 Mb/s
streams), 63 (4 Mb/s streams) or 31 (2 Mb/s streams) from the frame boundary.
13.5
Address 0023h to 0042h.
Thirty-two local input delay registers (LIDR0 to LIDR31) allow users to program the input bit delay for the local input
data streams LSTi0-31. The possible adjustment is up to 7 3/4 of the data rate, advancing forward with a resolution
of 1/4 of the data rate. The data rate can be either 2 Mb/s, 4 Mb/s, 8 Mb/s or 16 Mb/s.
The LIDR0 to LIDR31 registers are configured as follows:
LIDRn Bit
(where n = 0
to 31)
15-5
4-0
Local Input Bit Delay Registers (LIDR0 to LIDR31)
Local Channel Delay Bits 7-0 (LCD7 - LCD0)
Reserved
LIDn(4:0)
Name
Table 20 - Local Input Channel Delay Programming Table
Table 21 - Local Channel Delay Register (LIDRn) Bits
0 Channel (Default)
Channel Delay
Input Stream
253 Channels
254 Channels
255 Channels
2 Channels
3 Channels
4 Channels
5 Channels
1 Channel
Reset
0
0
...
...
Zarlink Semiconductor Inc.
Reserved
Local Input Bit Delay Register
The binary value of these bits refers to the input bit delay value
for the local input stream
MT90869
56
Corresponding
LCD7-LCD0
Delay Bits
0000 0000
0000 0001
0000 0010
0000 0011
0000 0100
0000 0101
1111 1101
1111 1110
1111 1111
...
...
Description
Data Sheet