XC2S600E-6FG676C Xilinx Inc, XC2S600E-6FG676C Datasheet - Page 108
XC2S600E-6FG676C
Manufacturer Part Number
XC2S600E-6FG676C
Description
FPGA Spartan-IIE Family 600K Gates 15552 Cells 357MHz 0.15um Technology 1.8V 676-Pin FBGA
Manufacturer
Xilinx Inc
Datasheet
1.XC2S50E-6TQG144C.pdf
(108 pages)
Specifications of XC2S600E-6FG676C
Package
676FBGA
Family Name
Spartan-IIE
Device Logic Cells
15552
Device Logic Units
3456
Device System Gates
600000
Maximum Internal Frequency
357 MHz
Typical Operating Supply Voltage
1.8 V
Maximum Number Of User I/os
514
Ram Bits
294912
Re-programmability Support
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC2S600E-6FG676C
Manufacturer:
XILINX
Quantity:
1 238
Company:
Part Number:
XC2S600E-6FG676C
Manufacturer:
XILINX
Quantity:
465
Part Number:
XC2S600E-6FG676C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
Spartan-IIE FPGA Family: Pinout Tables
Revision History
108
Version
No.
1.0
1.1
2.0
2.1
2.3
11/15/01
12/20/01
11/18/02
02/14/03
06/18/08
Date
Initial Xilinx release.
Corrected differential pin pair designations.
Added XC2S400E and XC2S600E and FG676. Removed L37 designation from FT256 pinouts.
Minor corrections and clarifications to pinout definitions. Removed Preliminary designation.
Added differential pairs table on
Clarified that XC2S50E has two VREF pins per bank.
Added
numbering. Updated links. Synchronized all modules to v2.3.
Package Overview
section. Updated all modules for continuous page, figure, and table
www.xilinx.com
page
57, fixed 3 P/N designation typos introduced in v2.0.
Description
DS077-4 (2.3) June 18, 2008
Product Specification
R