XC2S600E-6FG676C Xilinx Inc, XC2S600E-6FG676C Datasheet - Page 48

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XC2S600E-6FG676C

Manufacturer Part Number
XC2S600E-6FG676C
Description
FPGA Spartan-IIE Family 600K Gates 15552 Cells 357MHz 0.15um Technology 1.8V 676-Pin FBGA
Manufacturer
Xilinx Inc
Datasheet

Specifications of XC2S600E-6FG676C

Package
676FBGA
Family Name
Spartan-IIE
Device Logic Cells
15552
Device Logic Units
3456
Device System Gates
600000
Maximum Internal Frequency
357 MHz
Typical Operating Supply Voltage
1.8 V
Maximum Number Of User I/os
514
Ram Bits
294912
Re-programmability Support
Yes

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Spartan-IIE FPGA Family: DC and Switching Characteristics
TBUF Switching Characteristics
JTAG Test Access Port Switching Characteristics
Configuration Switching Characteristics
Notes:
1.
48
Setup/Hold Times with Respect to TCK
Sequential Delays
T
TAPTCK
Before configuration can begin, V
Symbol
T
Symbol
T
TCKTDO
T
FTCK
T
OFF
ON
IO
/ T
TCKTAP
T
T
T
T
POR
PL
ICCK
PROGRAM
Symbol
IN input to OUT output
TRI input to OUT output high impedance
TRI input to valid data on OUT output
PROGRAM
TMS and TDI setup times and hold times
Output delay from clock TCK to output TDO
TCK clock frequency
V
INIT
CC
(1)
Power-on reset
Program latency
CCLK output delay (Master serial
mode only)
Program pulse width
CCINT
Figure 23: Configuration Timing on Power-Up
and V
Description
Description
Description
CCO
Bank 2 must reach the recommended operating voltage.
www.xilinx.com
CCLK Output or Input
T
POR
M0, M1, M2
(Required)
T
PL
Min
300
4.0 / 2.0
0.5
-
-
Min
All Devices
-
-
T
ICCK
-7
Valid
Speed Grade
Max
11.0
Max
100
33
Max
2
4
0.1
0.1
-
-
DS001_12_102301
-7
0
Speed Grade
4.0 / 2.0
DS077-3 (v2.3) June 18, 2008
.
Min
Units
-
-
ms
μ
μ
ns
s
s
Max
0.11
0.11
Product Specification
-6
-6
0
Max
11.0
33
-
Units
ns
ns
ns
Units
MHz
ns
ns
R

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