LPC1774FBD208,551 NXP Semiconductors, LPC1774FBD208,551 Datasheet - Page 61
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LPC1774FBD208,551
Manufacturer Part Number
LPC1774FBD208,551
Description
IC MCU 32BIT 128KB FLASH 208LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr
Datasheet
1.LPC1774FBD208551.pdf
(117 pages)
Specifications of LPC1774FBD208,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, EBI/EMI, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
165
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-7567
LPC1774FBD208,551
LPC1774FBD208,551
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1774FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
LPC178X_7X
Objective data sheet
7.33.1.1 Internal RC oscillator
7.33.1.2 Main oscillator
The IRC may be used as the clock that drives the PLL and subsequently the CPU. The
nominal IRC frequency is 12 MHz. The IRC is trimmed to 1 % accuracy over the entire
voltage and temperature range.
Upon power-up or any chip reset, the LPC178x/7x use the IRC as the clock source.
Software may later switch to one of the other available clock sources.
The main oscillator can be used as the clock source for the CPU, with or without using the
PLL. The main oscillator also provides the clock source for the alternate PLL1.
The main oscillator operates at frequencies of 1 MHz to 25 MHz. This frequency can be
boosted to a higher frequency, up to the maximum CPU operating frequency, by the main
PLL. The clock selected as the PLL input is PLLCLKIN. The ARM processor clock
frequency is referred to as CCLK elsewhere in this document. The frequencies of
PLLCLKIN and CCLK are the same value unless the PLL is active and connected. The
clock frequency for each peripheral can be selected individually and is referred to as
PCLK. Refer to
Fig 7.
main oscillator
IRC oscillator
LPC178x/7x clock generation block diagram
(osc_clk)
All information provided in this document is subject to legal disclaimers.
Section 7.33.2
LPC178x/7x
Rev. 2 — 27 May 2011
alt_pll_clk
pll_clk
pll_clk
sysclk
sysclk
(system clock select)
(CPU clock select)
(USB clock select)
for additional information.
CLKSRCSEL
USBCLKSEL
CCLKSEL
MAIN PLL0
ALT PLL1
32-bit ARM Cortex-M3 microcontroller
CLOCK DIVIDER
CLOCK DIVIDER
CLOCK DIVIDER
PERIPHERAL
CPU CLOCK
DIVIDER
EMC
USB
pll_clk
sysclk
alt_pll_clk
LPC178x/7x
© NXP B.V. 2011. All rights reserved.
cclk
pclk
emc_clk
usb_clk
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