LPC1774FBD208,551 NXP Semiconductors, LPC1774FBD208,551 Datasheet - Page 71
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LPC1774FBD208,551
Manufacturer Part Number
LPC1774FBD208,551
Description
IC MCU 32BIT 128KB FLASH 208LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr
Datasheet
1.LPC1774FBD208551.pdf
(117 pages)
Specifications of LPC1774FBD208,551
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, EBI/EMI, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
165
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
40K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
208-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-7567
LPC1774FBD208,551
LPC1774FBD208,551
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1774FBD208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
10. Static characteristics
Table 11.
T
LPC178X_7X
Objective data sheet
Symbol
Supply pins
V
V
V
V
V
I
I
I
DD(REG)(3V3)
BAT
DD(IO)
amb
DD(3V3)
DD(REG)(3V3)
DDA
i(VBAT)
i(VREFP)
=
40
Static characteristics
C to +85
Parameter
supply voltage (3.3 V)
regulator supply voltage
(3.3 V)
analog 3.3 V pad supply
voltage
input voltage on pin
VBAT
input voltage on pin
VREFP
regulator supply current
(3.3 V)
battery supply current
I/O supply current
C, unless otherwise specified.
All information provided in this document is subject to legal disclaimers.
Conditions
external rail
active mode; code
executed from flash; all
peripherals disabled
PCLK = CCLK/4
active mode; code
executed from flash; all
peripherals enabled;
PCLK = CCLK/4
Sleep mode
Deep sleep mode
Power-down mode
Deep power-down mode
Deep power-down mode;
RTC running
Deep sleep mode
Power-down mode
Deep power-down mode
CCLK = 12 MHz; PLL
disabled
CCLK = 120 MHz; PLL
enabled
CCLK = 12 MHz; PLL
disabled
CCLK = 120 MHz; PLL
enabled
V
V
present
DD(REG)(3V3)
DD(REG)(3V3)
while(1){}
while(1){}
Rev. 2 — 27 May 2011
present
not
[4][5]
[4][6]
[4][6]
[2]
[3]
[4]
[4]
[4]
[4]
[4]
[7]
[8]
[9]
[9]
[9]
32-bit ARM Cortex-M3 microcontroller
Min
2.4
2.4
2.7
2.1
2.7
-
-
-
-
-
-
-
-
-
-
-
Typ
3.3
3.3
3.3
3.3
3.3
7.09
51.22
14
100
4.86
370
56
1.3
<tbd>
<tbd>
<tbd>
<tbd>
<tbd>
[1]
LPC178x/7x
© NXP B.V. 2011. All rights reserved.
Max
3.6
3.6
3.6
3.6
V
-
-
-
-
-
-
-
-
-
-
-
DDA
71 of 117
Unit
V
V
V
V
V
mA
mA
mA
mA
A
A
A
nA
nA
nA
nA
nA