MT48LC4M32B2TG-7 IT:GTR Micron Technology Inc, MT48LC4M32B2TG-7 IT:GTR Datasheet - Page 16
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MT48LC4M32B2TG-7 IT:GTR
Manufacturer Part Number
MT48LC4M32B2TG-7 IT:GTR
Description
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC4M32B2TG-7_ITGTR.pdf
(67 pages)
Specifications of MT48LC4M32B2TG-7 IT:GTR
Organization
4Mx32
Density
128Mb
Address Bus
14b
Access Time (max)
17/8/5.5ns
Maximum Clock Rate
143MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
175mA
Pin Count
86
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Not Compliant
Operating Mode
Write Burst Mode
Table 7:
PDF: 09005aef80872800/Source: 09005aef80863355
128MbSDRAMx32_2.fm - Rev. L 1/09 EN
CAS Latency
The normal operating mode is selected by setting M7 and M8 to zero; the other combi-
nations of values for M7 and M8 are reserved for future use and/or test modes. The
programmed BL applies to both read and write bursts.
Test modes and reserved states should not be used because unknown operation or
incompatibility with future versions may result.
When M9 = 0, BL programmed via M0–M2 applies to both read and write bursts; when
M9 = 1, the programmed BL applies to read bursts, but write accesses are single-location
(nonburst) accesses.
Speed
-6
-7
16
CL = 1
≤ 50
≤ 50
Allowable Operating Frequency (MHz)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
CL = 2
≤ 100
≤ 100
©2001 Micron Technology, Inc. All rights reserved.
128Mb: x32 SDRAM
Register Definition
CL = 3
≤ 166
≤ 143