AM186CC-50KD\W C AMD (ADVANCED MICRO DEVICES), AM186CC-50KD\W C Datasheet - Page 62

• Manufacturer Part Number: AM186CC-50KD\W C
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM186CC-50KD\W C

• Lead Free Status / Rohs Status: Compliant

Notes:
1. All timing parameters are measured at V
2. Testing is performed with equal loading on referenced pins.
3. The timing of this signal is different during a write cycle depending on whether it is configured to be DEN or DS.
4. This parameter applies to the DEN, DS, WR, WHB, and WLB signals.
62
Write Cycle Timing Responses
No.
30
31
32
33
34
35
65
67
68
87
are with the load values shown in Table 35, “Pin List Summary,” on page A-12.
Symbol Description
t
t
t
t
t
t
t
WHDEX
t
CHCSV
CLDOX
CVCTX
t
WLWH
t
WHLH
WHDX
AVWL
CHAV
AVBL
Parameter
Data hold time
Control inactive
delay
WR pulse width
WR inactive to ALE
High
Hold data after WR
WR inactive to
DEN inactive
A address valid to
WR Low
CLKOUT High to
LCS/UCS valid
CLKOUT High to A
address valid
A address valid to
WHB, WLB Low
2
3,4
2,3
Am186™CC Communications Controller Data Sheet
2
Table 12. Write Cycle Timing
2t
t
t
CLCL
CLCL
CLCL
CC
t
t
t
CLCH
CLCH
CHCL
/2 with 50-pF loading on CLKOUT unless otherwise noted. All output test conditions
+ t
Min
– 10 = 30
– 10 = 70
0
0
0
0
CHCL
25 MHz
– 2
– 3
– 3
–3
Max
20
20
20
20
—
—
—
—
—
—
2t
t
t
CLCL
CLCL
CLCL
t
CHCL
t
CLCH
t
CLCH
1.25
Preliminary
Min
– 10 = 15
+ t
1
– 10 = 40
0
0
0
0
– 1.25
40 MHz
(Continued)
CHCL
– 2
–
Max
12
10
10
12
—
—
—
—
—
—
2t
t
t
CLCL
CLCL
CLCL
t
(Commercial Only)
CHCL
t
CLCH
t
1.25
Min
CLCH
– 10 = 10
+ t
– 10 = 30
0
0
0
0
– 1.25
50 MHz
CHCL
– 2
–
Max
—
10
—
—
—
10
10
10
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns