AT89C51ID2-SLSIM Atmel, AT89C51ID2-SLSIM Datasheet - Page 19

• Manufacturer Part Number: AT89C51ID2-SLSIM
• Description: C51ID2 64KF TWI 32KHZ PLCC44 3-5.5V IND.
• Manufacturer: Atmel

Design Considerations
Oscillators Control
Prescaler Divider
19
AT89C51ID2
Table 20. Overview (Continued)
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PCON.1 PCON.0
0
1
PwdOscA and PwdOscB signals are generated in the Clock generator and used to
control the hard blocks of oscillators A and B.
PwdOscA =’1’ stops OscA
PwdOscB =’1’ stops OscB
The following tables summarize the Operating modes:
A hardware RESET puts the prescaler divider in the following state:
–
CKS signal selects OSCA or OSCB: F
Any value between FFh down to 00h can be written by software into CKRL register
in order to divide frequency of the selected oscillator:
–
–
PCON.1
PCON.1
CKRL = FFh: F
CKRL = 00h: minimum frequency
F
F
CKRL = FFh: maximum frequency
F
F
CLK CPU
CLK CPU
CLK CPU
CLK CPU
0
1
0
0
1
0
X
1
= F
= F
= F
= F
OscBEn OscAEn
CLK PERIPH
CLK PERIPH
CLK PERIPH
CLK PERIPH
1
X
CLK CPU
OscAEn
OscBEn
X
1
= F
= F
= F
= F
= F
1
X
0
1
X
0
OSCA
OSCA
OSCA
OSCA
CLK PERIPH
CKS
/1020 (Standard Mode)
/510 (X2 Mode)
X
0
/2 (Standard Mode)
(X2 Mode)
CLK OUT
IDLE MODE B
POWER DOWN
MODE
Selected Mode
= F
OSCA
= F
PwdOscA
PwdOscB
/2 (Standard C51 feature)
OSCA
0
1
1
0
1
1
or F
The CPU is off, OscB supplies the
peripherals, OscA can be disabled
(OscAEn = 0)
The CPU and peripherals are off,
OscA and OscB are stopped
OSCB
Comment
Power-down mode
Power-down mode
OscA stopped by
OscA stopped by
OscB stopped by
OscB stopped by
clearing OscAEn
clearing OscBEn
OscA running
OscB running
Comments
Comments
4289C–8051–11/05