AT89C51ID2-SLSIM Atmel, AT89C51ID2-SLSIM Datasheet - Page 33

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AT89C51ID2-SLSIM

Manufacturer Part Number
AT89C51ID2-SLSIM
Description
C51ID2 64KF TWI 32KHZ PLCC44 3-5.5V IND.
Manufacturer
Atmel
Datasheet

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Power Monitor
Description
4289C–8051–11/05
The POR/PFD function monitors the internal power-supply of the CPU core memories
and the peripherals, and if needed, suspends their activity when the internal power sup-
ply falls below a safety threshold. This is achieved by applying an internal reset to them.
By generating the Reset the Power Monitor insures a correct start up when
AT89C51ID2 is powered up.
In order to startup and maintain the microcontroller in correct operating mode, V
to be stabilized in the V
nominal amplitude compatible with logic level VIH/VIL.
These parameters are controlled during the three phases: power-up, normal operation
and power going down. See Figure 10.
Figure 10. Power Monitor Block Diagram
Note:
The Voltage regulator generates a regulated internal supply for the CPU core the mem-
ories and the peripherals. Spikes on the external Vcc are smoothed by the voltage
regulator.
RST pin
XTAL1
1. Once XTAL1 High and low levels reach above and below VIH/VIL. a 1024 clock
period delay will extend the reset coming from the Power Fail Detect. If the power
falls below the Power Fail Detect threshold level, the Reset will be applied
immediately.
PCA
Watchdog
Voltage Regulator
Power Fail Detect
Power On Reset
(1)
Hardware
Watchdog
VCC
CC
operating range and the oscillator has to be stabilized with a
Regulated
Supply
Internal Reset
Peripherals
CPU core
Memories
AT89C51ID2
CC
has
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