C8051T605-GSR Silicon Laboratories Inc, C8051T605-GSR Datasheet - Page 155
C8051T605-GSR
Manufacturer Part Number
C8051T605-GSR
Description
MCU 8-Bit C8051T60x 8051 CISC 2KB EPROM 1.8V/3V 14-Pin SOIC T/R
Manufacturer
Silicon Laboratories Inc
Datasheet
1.C8051T600SDB.pdf
(188 pages)
Specifications of C8051T605-GSR
Package
14SOIC
Device Core
8051
Family Name
C8051T60x
Maximum Speed
25 MHz
Ram Size
256 Byte
Program Memory Size
2 KB
Operating Supply Voltage
1.8|3 V
Data Bus Width
8 Bit
Program Memory Type
EPROM
Number Of Programmable I/os
8
Interface Type
I2C/SMBus/UART
Operating Temperature
-40 to 85 °C
Number Of Timers
3
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25.2. Timer 2
Timer 2 is a 16-bit timer formed by two 8-bit SFRs: TMR2L (low byte) and TMR2H (high byte). Timer 2 may
operate in 16-bit auto-reload mode or (split) 8-bit auto-reload mode. The T2SPLIT bit (TMR2CN.3) defines
the Timer 2 operation mode.
Timer 2 may be clocked by the system clock, the system clock divided by 12, or the external oscillator
source divided by 8. The external clock mode is ideal for real-time clock (RTC) functionality, where the
internal oscillator drives the system clock while Timer 2 (and/or the PCA) is clocked by an external preci-
sion oscillator. Note that the external oscillator source divided by eight is synchronized with the system
clock.
25.2.1. 16-bit Timer with Auto-Reload
When T2SPLIT (TMR2CN.3) is zero, Timer 2 operates as a 16-bit timer with auto-reload. Timer 2 can be
clocked by SYSCLK, SYSCLK divided by 12, or the external oscillator clock source divided by 8. As the
16-bit timer register increments and overflows from 0xFFFF to 0x0000, the 16-bit value in the Timer 2
reload registers (TMR2RLH and TMR2RLL) is loaded into the Timer 2 register as shown in Figure 25.4,
and the Timer 2 High Byte Overflow Flag (TMR2CN.7) is set. If Timer 2 interrupts are enabled, an interrupt
will be generated on each Timer 2 overflow. Additionally, if Timer 2 interrupts are enabled and the TF2LEN
bit is set (TMR2CN.5), an interrupt will be generated each time the lower 8 bits (TMR2L) overflow from
0xFF to 0x00.
External Clock / 8
SYSCLK / 12
SYSCLK
T2XCLK
0
1
Figure 25.4. Timer 2 16-Bit Mode Block Diagram
T2ML
0
1
TR2
TCLK
Rev. 1.2
Overflow
TL2
TMR2RLL TMR2RLH
TMR2L
C8051T600/1/2/3/4/5/6
To SMBus
TMR2H
Reload
To ADC,
SMBus
T2SPLIT
TF2LEN
T2XCLK
TF2H
TF2L
TR2
Interrupt
155
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