DS3170+ Maxim Integrated Products, DS3170+ Datasheet - Page 85

• Manufacturer Part Number: DS3170+
• Description: IC TXRX DS3/E3 100-CSBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3170+

• Function: Single-Chip Transceiver
• Interface: DS3, E3
• Number Of Circuits: 1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Current - Supply: 120mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LBGA
• Includes: DS3 Framers, E3 Framers, HDLC Controller, On-Chip BERTs
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -

Table 10-27. C-Bit DS3 Frame Overhead Bit Definitions
X
P
M
F
C
C
C
C
C
C
C
C
C
X
the parity bits used for line error monitoring. M
alignment bits. C
value of one. C
of one. C
Block Error (FEBE) bits used for remote path error monitoring. C
(or HDLC) bits. C
value of one. The X-bit, P-bit, M-bit, C-bit, and F-bit positions are overhead bits, and the other bit positions in the
T3 frame are payload bits regardless of how they are marked by TDEN.
10.6.5.2 Transmit C-bit DS3 Frame Generation
C-bit DS3 frame generation receives the incoming payload data stream, and overwrites all of the overhead bit
locations.
The multiframe alignment bits (M
respectively.
The subframe alignment bits (F
respectively.
The X-bits (X
programmable (automatic, 1, or 0). If the RDI is generated automatically, the X-bits are set to zero when one or
more of the indicated alarm conditions is present, and set to one when all of the indicated alarm conditions are
absent. Automatically setting RDI on LOS, SEF, LOF, or AIS is individually programmable (on or off).
The P-bits (P
payload parity is calculated by performing modulo 2 addition of all of the payload bits after all frame processing has
been completed. P-bit generation is programmable (on or off). The P-bits will be generated if either P-bit generation
is enabled or frame generation is enabled.
The bits C
The bit C
1
1
XY
1
11
12
13
21
31
41
51
61
71
1
, X
, P
, M
and X
, C
, C
, C
, C
, C
, C
2
2
2
22
32
42
52
62
72
, and M
BIT
, and C
, and C
, and C
, and C
, and C
, and C
2
13
31
11
are the Remote Defect Indication (RDI) bits (also referred to as the far-end SEF/AIS bits). P
, C
is overwritten with the Far-End Alarm and Control (FEAC) data input from the transmit FEAC controller.
, C
1
32
3
1
12
23
33
43
53
63
73
and P
13
, and C
, C
11
and X
61
is the Far-End Alarm and Control (FEAC) signal. C
is the Application Identification Channel (AIC). C
, C
21
Remote Defect Indication
(RDI)
Parity Bits
Multiframe Alignment Bits
Subframe Alignment Bits
Application Identification
Channel (AIC)
Reserved
Far-End Alarm and Control
(FEAC) signal
Unused
C-bit parity bits
Far-End Block Error (FEBE)
bits
Path Maintenance Data Link
(or HDLC) bits
Unused
Unused
, C
2
) are both overwritten with the calculated payload parity from the previous DS3 frame. The
62
33
2
22
, and C
) are both overwritten with the Remote Defect Indicator (RDI). The RDI source is
, C
are the C-bit parity bits used for path error monitoring. C
23
DEFINITION
, C
X1
63
61
, F
are unused, and have a value of one. C
, C
1
X2
, M
, F
62
, C
2
X3
, and M
, and F
63
, C
1
71
, M
, C
X4
3
2
) are overwritten with the values zero, one, and zero (010)
) are overwritten with the values one, zero, zero, and one (1001)
, and M
72
85 of 230
, and C
3
73
are the multiframe alignment bits. F
are all overwritten with a one.
51
, C
12
21
52
is reserved for future network use, and has a
, C
, and C
22
DS3170 DS3/E3 Single-Chip Transceiver
71
, and C
, C
53
72
are the path maintenance data link
, and C
23
41
, C
are unused, and have a value
42
73
, and C
are unused, and have a
XY
43
are the subframe
are the Far-End
1
and P
2
are