CY7C4291-15JXCT Cypress Semiconductor Corp, CY7C4291-15JXCT Datasheet - Page 9

• Manufacturer Part Number: CY7C4291-15JXCT
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C4291-15JXCT

• Lead Free Status / Rohs Status: Compliant

Document #: 38-06007 Rev. *C
Switching Waveforms
Reset Timing
WEN2/LD
Notes:
15. The clocks (RCLK, WCLK) can be free-running during reset.
16. After reset, the outputs will be LOW if OE = 0 and three-state if OE=1.
17. Holding WEN2/LD HIGH during reset will make the pin act as a second enable pin. Holding WEN2/LD LOW during reset will make the pin act as a load enable
for the programmable flag offset registers.
EF,PAE
FF,PAF
Q
REN1,
WEN1
0
REN2
–Q
RS
[17]
8
[15]
(continued)
t
t
t
RSF
RSF
RSF
t
RS
t
t
t
RSS
RSS
RSS
t
t
t
RSR
RSR
RSR
OE = 0
OE = 1
CY7C4281
CY7C4291
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