AT29C432-12TU Atmel, AT29C432-12TU Datasheet - Page 9

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AT29C432-12TU

Manufacturer Part Number
AT29C432-12TU
Description
Manufacturer
Atmel
Datasheet

Specifications of AT29C432-12TU

Lead Free Status / Rohs Status
Compliant
Chip Enable Delays
Chip Enable Delays
Concurrent Read While Write
Concurrent Read While Write
Notes: 1. The Flash array may be read in between individual
byte loads to the E
This diagram only illustrates one read access be-
tween byte loads, but the host processor may con-
tinue reading the Flash array so long as t
violated. This effectively allows the host the opportu-
nity to respond to system interrupts while operating
out of the Flash program memory, even in the mid-
dle of performing an E
2
PROM array as shown above.
2
PROM data update.
BLC
is not
2. Flash read operations are also valid throughout the
2. Flash read operations are also valid throughout the
3. Having both CEF and CEE active simultaneously is an
3. Having both CEF and CEE active simultaneously is an
E
E
illegal state.
illegal state.
2
2
PROM’s internal write cycle defined by t
PROM’s internal write cycle defined by t
AT29C432
WCE
WCE
.
.
9

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