CY8C5368AXI-106 Cypress Semiconductor Corp, CY8C5368AXI-106 Datasheet - Page 20

• Manufacturer Part Number: CY8C5368AXI-106
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY8C5368AXI-106

• Lead Free Status / Rohs Status: Compliant

The central timewheel is a 1 KHz, free-running, 13-bit counter
clocked by the ILO. The central timewheel is always enabled
except in hibernate mode and when the CPU is stopped during
debug on chip mode. It can be used to generate periodic
interrupts for timing purposes or to wake the system from a low
power mode. Firmware can reset the central timewheel.
The central timewheel can be programmed to wake the system
periodically and optionally issue an interrupt. This enables
flexible, periodic wakeups from low power modes or coarse
timing applications. Systems that require accurate timing should
use the RTC capability instead of the central timewheel.
The 100 KHz clock (CLK100K) works as a low-power system
clock to run the CPU. It can also generate time intervals such as
fast sleep intervals using the fast timewheel.
The fast timewheel is a 100 kHz, 5-bit counter clocked by the ILO
that can also be used to wake the system. The fast timewheel
settings are programmable, and the counter automatically resets
when the terminal count is reached. This enables flexible,
periodic wakeups of the CPU at a higher rate than is allowed
using the central timewheel. The fast timewheel can generate an
optional interrupt each time the terminal count is reached.
The 33 KHz clock (CLK33K) comes from a divide-by-3 operation
on CLK100K. This output can be used as a reduced accuracy
version of the 32.768 KHz ECO clock with no need for a crystal.
6.1.2 External Oscillators
6.1.2.1 MHz External Crystal Oscillator
The MHzECO provides high frequency, high precision clocking
using an external crystal (see
variety of crystal types, in the range of 4 to 25 MHz. When used
in conjunction with the PLL, it can generate CPU and system
clocks
Phase-Locked Loop
the external crystal and capacitors are fixed. If a crystal is not
used then Xi must be shorted to ground and Xo must be left
floating. MHzECO accuracy depends on the crystal chosen.
Figure 6-2. MHzECO Block Diagram
Document Number: 001-66237 Rev. *A
Components
External
Xi
up
to
Crystal Osc
4 - 25 MHz
the
on page 19). The GPIO pins connecting to
device's
4 – 25 MHz
Capacitors
crystal
XCLK_ MHZ
Xo
Figure
maximum
6-2). It supports a wide
PRELIMINARY
frequency
(see
6.1.2.2 32.768 kHz ECO
The 32.768 KHz external crystal oscillator (32kHzECO) provides
precision timing with minimal power consumption using an
external 32.768 KHz watch crystal (see
32kHzECO also connects directly to the sleep timer and provides
the source for the RTC. The RTC uses a 1-second interrupt to
implement the RTC functionality in firmware.
The oscillator works in two distinct power modes. This allows
users to trade off power consumption with noise immunity from
neighboring circuits. The GPIO pins connected to the external
crystal and capacitors are fixed.
Figure 6-3. 32kHzECO Block Diagram
6.1.2.3 Digital System Interconnect
The DSI provides routing for clocks taken from external clock
oscillators connected to I/O. The oscillators can also be
generated within the device in the digital system and Universal
Digital Blocks.
While the primary DSI clock input provides access to all clocking
resources, up to eight other DSI clocks (internally or externally
generated) may be routed directly to the eight digital clock
dividers. This is only possible if there are multiple precision clock
sources.
Components
External
(Pin P15[3])
PSoC
Xi
®
Crystal Osc
32 kHz
5: CY8C53 Family Datasheet
(Pin P15[2])
32 kHz
crystal
Capacitors
Xo
XCLK32K
Figure
Page 20 of 106
6-3). The
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