SC16C751BIBS,157 NXP Semiconductors, SC16C751BIBS,157 Datasheet - Page 20

IC UART SINGLE W/FIFO 24-HVQFN

SC16C751BIBS,157

Manufacturer Part Number
SC16C751BIBS,157
Description
IC UART SINGLE W/FIFO 24-HVQFN
Manufacturer
NXP Semiconductors
Datasheet

Specifications of SC16C751BIBS,157

Features
Programmable
Number Of Channels
1, UART
Fifo's
64 Byte
Voltage - Supply
2.5V, 3.3V, 5V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935284741157
SC16C751BIBS
SC16C751BIBS
NXP Semiconductors
SC16C751B_2
Product data sheet
7.10 SC16C751B external reset conditions
7.8 Modem Status Register (MSR)
7.9 Scratchpad Register (SPR)
This register provides the current state of the control interface signals from the modem, or
other peripheral device to which the SC16C751B is connected. Four bits of this register
are used to indicate the changed information. These bits are set to a logic 1 whenever a
control input from the modem changes state. These bits are set to a logic 0 whenever the
CPU reads this register.
Table 19.
[1]
The SC16C751B provides a temporary data register to store 8 bits of user information.
Table 20.
Table 21.
Bit
7:5
4
3:1
0
Register
IER
ISR
LCR
MCR
LSR
MSR
FCR
Output
TX
RTS
INT
Whenever any MSR[0] is set to logic 1, a Modem Status Interrupt will be generated if modem status
interrupt is enabled.
Symbol
MSR[7:5]
MSR[4]
MSR[3:1]
MSR[0]
Modem Status Register bits description
Reset state for registers
Reset state for outputs
Reset state
IER[7:0] = 0
ISR[7:1] = 0; ISR[0] = 1
LCR[7:0] = 0
MCR[7:0] = 0
LSR[7] = 0; LSR[6:5] = 1; LSR[4:0] = 0
MSR[7:4] = input signals; MSR[3:0] = 0
FCR[7:0] = 0
Reset state
HIGH
HIGH
LOW
Description
reserved
Clear To Send. CTS. CTS functions as hardware flow control signal input if it
is enabled via MCR[5]. Flow control (when enabled) allows starting and
stopping the transmissions based on the external modem CTS signal. A
logic 1 at the CTS pin will stop SC16C751B transmissions as soon as current
character has finished transmission. Normally MSR[4] is the complement of
the CTS input. However, in the Loopback mode, this bit is equivalent to the
RTS bit in the MCR register.
reserved
CTS
logic 0 = no CTS change (normal default condition)
logic 1 = the CTS input to the SC16C751B has changed state since the last
time it was read. A modem Status Interrupt will be generated.
Rev. 02 — 10 October 2008
[1]
5 V, 3.3 V and 2.5 V UART with 64-byte FIFOs
SC16C751B
© NXP B.V. 2008. All rights reserved.
20 of 32

Related parts for SC16C751BIBS,157