SC68C752BIB48,128 NXP Semiconductors, SC68C752BIB48,128 Datasheet - Page 11
![IC UART DUAL 48LQFP](/photos/6/64/66484/568-48-lqfp_sot313-2_sml.jpg)
SC68C752BIB48,128
Manufacturer Part Number
SC68C752BIB48,128
Description
IC UART DUAL 48LQFP
Manufacturer
NXP Semiconductors
Datasheet
1.SC68C752BIBS128.pdf
(48 pages)
Specifications of SC68C752BIB48,128
Number Of Channels
2, DUART
Fifo's
64 Byte
Voltage - Supply
2.5V, 3.3V, 5V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Package / Case
48-LQFP
Transmit Fifo
64Byte
Receive Fifo
64Byte
Transmitter And Receiver Fifo Counter
Yes
Data Rate
5Mbps
Package Type
LQFP
Operating Supply Voltage (max)
5.5V
Mounting
Surface Mount
Pin Count
48
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935278767128
SC68C752BIB48-F
SC68C752BIB48-F
SC68C752BIB48-F
SC68C752BIB48-F
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SC68C752BIB48,128
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
SC68C752B_4
Product data sheet
6.3.3.1 Assumptions
6.3.3 Software flow control example
UART1 is transmitting a large text file to UART2. Both UARTs are using software flow
control with single character Xoff (0F) and Xon (0D) tokens. Both have Xoff threshold
(TCR[3:0] = F) set to 60, and Xon threshold (TCR[7:4] = 8) set to 32. Both have the
interrupt receive threshold (TLR[7:4] = D) set to 52.
UART1 begins transmission and sends 52 characters, at which point UART2 will generate
an interrupt to its processor to service the RX FIFO, but assume the interrupt latency is
fairly long. UART1 will continue sending characters until a total of 60 characters have
been sent. At this time, UART2 will transmit a 0Fh to UART1, informing UART1 to halt
transmission. UART1 will likely send the 61
character. Now UART2 is serviced and the processor reads enough data out of the RX
FIFO that the level drops to 32. UART2 will now send a 0Dh to UART1, informing UART1
to resume transmission.
Fig 7.
Software flow control example
SERIAL-TO-PARALLEL
PARALLEL-TO-SERIAL
TRANSMIT FIFO
Xon1 WORD
Xon2 WORD
Xoff1 WORD
Xoff2 WORD
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 64-byte FIFOs
UART1
Rev. 04 — 20 January 2010
Xoff–Xon–Xoff
programmed
characters
compare
Xon-Xoff
st
data
character while UART2 is sending the Xoff
SERIAL-TO-PARALLEL
PARALLEL-TO-SERIAL
RECEIVE FIFO
Xon2 WORD
Xon1 WORD
Xoff1 WORD
Xoff2 WORD
SC68C752B
UART2
© NXP B.V. 2010. All rights reserved.
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