SC16IS762IBS-T NXP Semiconductors, SC16IS762IBS-T Datasheet - Page 25
![IC UART DUAL I2C/SPI 32-HVQFN](/photos/6/51/65170/568-32-hvqfn_sml.jpg)
SC16IS762IBS-T
Manufacturer Part Number
SC16IS762IBS-T
Description
IC UART DUAL I2C/SPI 32-HVQFN
Manufacturer
NXP Semiconductors
Datasheet
1.SC16IS752IBS151.pdf
(59 pages)
Specifications of SC16IS762IBS-T
Features
Low Current
Number Of Channels
2, DUART
Fifo's
64 Byte
Protocol
RS232, RS485
Voltage - Supply
2.5V, 3.3V
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
Mounting Type
Surface Mount
Package / Case
32-VFQFN Exposed Pad
For Use With
568-4000 - DEMO BOARD SPI/I2C TO DUAL UART568-3510 - DEMO BOARD SPI/I2C TO UART
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NXP Semiconductors
SC16IS752_SC16IS762_7
Product data sheet
Table 15.
Table 16.
Table 17.
Table 18.
Bit
5
4
3
2
1:0
LCR[5]
X
0
0
1
1
LCR[2]
0
1
1
LCR[1]
0
0
1
1
Symbol
LCR[5]
LCR[4]
LCR[3]
LCR[2]
LCR[1:0]
Line Control Register bits description
LCR[5] parity selection
LCR[2] stop bit length
LCR[1:0] word length
Word length (bits)
5, 6, 7, 8
5
6, 7, 8
LCR[0]
0
1
0
1
LCR[4]
X
0
1
0
1
Dual UART with I
Description
Set parity. LCR[5] selects the forced parity format (if LCR[3] = logic 1).
Parity type select.
Parity enable.
Number of Stop bits. Specifies the number of stop bits.
Word length bits 1, 0. These two bits specify the word length to be
transmitted or received (see
Rev. 07 — 19 May 2008
logic 0 = parity is not forced (normal default condition).
LCR[5] = logic 1 and LCR[4] = logic 0: parity bit is forced to a logical 1
for the transmit and receive data.
LCR[5] = logic 1 and LCR[4] = logic 1: parity bit is forced to a logical 0
for the transmit and receive data.
logic 0 = odd parity is generated (if LCR[3] = logic 1)
logic 1 = even parity is generated (if LCR[3] = logic 1)
logic 0 = no parity (normal default condition)
logic 1 = a parity bit is generated during transmission and the receiver
checks for received parity
0 to 1 stop bit (word length = 5, 6, 7, 8)
1 to 1.5 stop bits (word length = 5)
1 = 2 stop bits (word length = 6, 7, 8)
Word length (bits)
5
6
7
8
LCR[3]
0
1
1
1
1
Parity selection
no parity
odd parity
even parity
forced parity ‘1’
forced parity ‘0’
Stop bit length (bit times)
1
1
2
1
2
2
SC16IS752/SC16IS762
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
…continued
Table
18).
© NXP B.V. 2008. All rights reserved.
25 of 59