LM4937RL/NOPB National Semiconductor, LM4937RL/NOPB Datasheet - Page 26

IC AUDIO SUBSYSTM 1.25W 36USMDXT

LM4937RL/NOPB

Manufacturer Part Number
LM4937RL/NOPB
Description
IC AUDIO SUBSYSTM 1.25W 36USMDXT
Manufacturer
National Semiconductor
Series
Boomer®r
Type
Class ABr
Datasheet

Specifications of LM4937RL/NOPB

Output Type
1-Channel (Mono) with Mono and Stereo Headphones
Max Output Power X Channels @ Load
1.25W x 1 @ 8 Ohm; 80mW x 2 @ 32 Ohm
Voltage - Supply
2.7 V ~ 5.5 V
Features
Depop, Differential Inputs, I²C, I²S, Mute, Shutdown, SPI, Volume Control
Mounting Type
Surface Mount
Package / Case
36-MicroSMDxt
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LM4937RLTR
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Interface Control Register
This register is used to control the I2S and I
INTERFACE (0Fh) (Set = logic 1, Clear = logic 0)
NOTES:
The master I2S format depends on the DAC mode. In USB mode the number of bits per word is 25 (i.e. 2.4MHz for a 48kHz sample rate). The duty cycle is 40/60.
In non-USB modes the format is 32 or 16 bits per word, depending on I2S_RESOLTION and the duty cycle is always 50-50. In slave mode it will decode any I2S
compatible data stream.
Bits
0
1
2
3
2
C compatible interface on the chip.
Register
I2S_MASTER_SLAVE
I2S_RESOLUTION
I2S_MODE
I2C_FAST
Left Justified Mode Timing
I2S Mode Timing
26
Description
If set the LM4937 acts as a master for
I2S, so both I2S clock and I2S word
select are configured as outputs. If
cleared the LM4937 acts as a slave
where both I2S clock and word select
are configured as inputs.
If set the I2S resolution is set to 32 bits.
If clear, resolution is set to 16 bits. This
bit only affects the I2S Interface in
master mode. In slave mode the I2S
Interface can support any I2S
compatible resolution. In master mode
the I2S resolution also depends on the
DAC mode as the note below explains.
If set the I2S is configured in left
justified mode timing. If clear, the I2S
interface is configured in normal I2S
mode timing.
If set enables the I2C to run in fast
mode with an I2C clock up to 3.4MHz.
If clear the I2C speed gets its default
value of a maximum of 400kHz
20202027
20202028

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