LM49370RL/NOPB National Semiconductor, LM49370RL/NOPB Datasheet - Page 31

• Manufacturer Part Number: LM49370RL/NOPB
• Description: IC AUDIO SUBSYSTEM 1.2W 49USMDXT
• Manufacturer: National Semiconductor
• Series: Boomer®, PowerWise®r
• Type: Class Dr

Specifications of LM49370RL/NOPB

• Output Type: 1-Channel (Mono) with Mono and Stereo Headphones
• Max Output Power X Channels @ Load: 1.2W x 1 @ 8 Ohm; 52mW x 2 @ 16 Ohm
• Voltage - Supply: 2.5 V ~ 5.5 V
• Features: 3D, Depop, I²C, I²S, Microphone, Mute, PCM, Shutdown, SPI, Standby, Volume Control
• Mounting Type: Surface Mount
• Package / Case: 49-MicroSMDxt
• Dc: 07+
• For Use With: LM49370RLEVAL - BOARD EVALUATION LM49370RL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LM49370RLTR

Bit
4:2 AGC_FRAME_TIME This sets the frame time to be used by the AGC algorithm. In a given frame, the AGC's peak detector
6:5
s
0
1
7
12.11 ADC_2 CONFIGURATION REGISTER
This register is used to control the LM49370's audio ADC.
Note 16: Refer to the AGC overview for further detail.
ADC_MODE
ADC_MUTE
ADC_CLK
NGZXDD
Field
This sets the oversampling ratio of the ADC
If set, the analog inputs to the ADC are muted.
determines the peak value of the incoming microphone audio signal and compares this value to the target
value of the AGC defined by AGC_TARGET (bits [3:1] of register (0x08h)) in order to adjust the microphone
preamplifier's gain accordingly. AGC_FRAME_TIME basically sets the sample rate of the AGC to adjust for
a wide variety of speech patterns. (Note 16)
This selects the clock to be used by the audio ADC system.
If set, the noise gate will not wait for a zero crossing before mute/unmuting. This bit should be set if the
ADC's HPF is disabled and if there is a large DC or low frequency component at the ADC input.
AGC_FRAME_TIME
ADC_CLK
NGZXDD
MODE
000
001
010
011
100
101
110
111
00
01
10
11
TABLE 13. ADC_2 (0x07h)
0
1
0
1
2
2
2
2
2
2
2
2
2
2
2
2
31
Description
Noise Gate operates on frame boundaries
Noise Gate operates on ZXD events
PLL_OUTPUT
PCM_CLK_IN
I2S_CLK_IN
ADC OSR
Time (ms)
Source
Result
MCLK
125fs
128fs
1000
128
192
256
384
512
768
96
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