MX29LV160TMC-90 Macronix International Co., MX29LV160TMC-90 Datasheet

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MX29LV160TMC-90

Manufacturer Part Number
MX29LV160TMC-90
Description
Manufacturer
Macronix International Co.
Datasheet

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Part Number:
MX29LV160TMC-90
Manufacturer:
MX
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Part Number:
MX29LV160TMC-90
Manufacturer:
MXIC
Quantity:
631
FEATURES
• Extended single - supply voltage range 2.7V to 3.6V
• 2,097,152 x 8/1,048,576 x 16 switchable
• Single power supply operation
• Fast access time: 70/90ns
• Low power consumption
• Command register architecture
• Auto Erase (chip & sector) and Auto Program
• Erase Suspend/Erase Resume
• Status Reply
GENERAL DESCRIPTION
The MX29LV160T/B & MX29LV160AT/AB is a 16-mega
bit Flash memory organized as 2M bytes of 8 bits or 1M
words of 16 bits. MXIC's Flash memories offer the most
cost-effective and reliable read/write non-volatile random
access memory. The MX29LV160T/B & MX29LV160AT/
AB is packaged in 44-pin SOP, 48-pin TSOP and 48-ball
CSP. It is designed to be reprogrammed and erased in
system or in standard EPROM programmers.
The standard MX29LV160T/B & MX29LV160AT/AB of-
fers access time as fast as 70ns, allowing operation of
high-speed microprocessors without wait states. To elimi-
nate bus contention, the MX29LV160T/B &
MX29LV160AT/AB has separate chip enable (CE) and
output enable (OE) controls.
MXIC's Flash memories augment EPROM functionality
with in-circuit electrical erasure and programming. The
MX29LV160T/B & MX29LV160AT/AB uses a command
register to manage this functionality. The command reg-
ister allows for 100% TTL level control inputs and fixed
P/N:PM0866
- 3.0V only operation for read, erase and program
operation
- 30mA maximum active current
- 0.2uA typical standby current
- Byte/word Programming (9us/11us typical)
- Sector Erase (Sector structure 16K-Bytex1,
8K-Bytex2, 32K-Bytex1, and 64K-Byte x31)
- Automatically erase any combination of sectors with
Erase Suspend capability.
- Automatically program and verify data at specified
address
- Suspends sector erase operation to read data from,
or program data to, any sector that is not being erased,
then resumes the erase.
- Data polling & Toggle bit for detection of program and
erase operation completion.
MX29LV160T/B & MX29LV160AT/AB
16M-BIT [2Mx8/1Mx16] CMOS SINGLE VOLTAGE
1
• Ready/Busy pin (RY/BY)
• Sector protection
• CFI (Common Flash Interface) compliant (for
• 100,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1V to VCC+1V
• Boot Sector Architecture
• Low VCC write inhibit is equal to or less than 1.4V
• Package type:
• Compatibility with JEDEC standard
power supply levels during erase and programming, while
maintaining maximum EPROM compatibility.
MXIC Flash technology reliably stores memory contents
even after 100,000 erase and program cycles. The MXIC
cell is designed to optimize the erase and programming
mechanisms. In addition, the combination of advanced
tunnel oxide processing and low internal electric fields
for erase and program operations produces reliable cy-
cling. The MX29LV160T/B & MX29LV160AT/AB uses a
2.7V~3.6V VCC supply to perform the High Reliability
Erase and auto Program/Erase algorithms.
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up pro-
tection is proved for stresses up to 100 milliamps on
address and data pin from -1V to VCC + 1V.
Part Name
MX29LV160T/B
MX29LV160AT/AB 1) With CFI compliant
- Provides a hardware method of detecting program or
erase operation completion.
- Hardware method to disable any combination of
sectors from program or erase operations
- Temporary sector unprotect allows code changes in
previously locked sectors.
MX29LV160AT/AB)
- Flash device parameters stored on the device and
provide the host system to access
- T = Top Boot Sector
- B = Bottom Boot Sector
- 44-pin SOP
- 48-pin TSOP
- 48-ball CSP (8x13mm:for MX29LV160T/B; 6x8mm:
for MX29LV160AT/AB)
- Pinout and software compatible with single-power
supply Flash
3V ONLY FLASH MEMORY
Difference
1) Without CFI compliant
2)CSP dimension:8x13mm
2)CSP dimension:6x8mm
REV. 3.7, APR. 23, 2003

Related parts for MX29LV160TMC-90

MX29LV160TMC-90 Summary of contents

Page 1

MX29LV160T/B & MX29LV160AT/AB FEATURES • Extended single - supply voltage range 2.7V to 3.6V • 2,097,152 x 8/1,048,576 x 16 switchable • Single power supply operation - 3.0V only operation for read, erase and program operation • Fast access time: ...

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MX29LV160T/B & MX29LV160AT/AB PIN CONFIGURATIONS 44 SOP(500 mil RESET 2 43 A19 A18 A17 A10 A11 A12 A13 A3 9 ...

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MX29LV160T/B & MX29LV160AT/AB BLOCK STRUCTURE Table 1: MX29LV160T & MX29LV160AT SECTOR ARCHITECTURE Sector Sector Size Byte Mode Word Mode Byte Mode(x8) SA0 64Kbytes 32Kwords 000000-00FFFF 00000-07FFF SA1 64Kbytes 32Kwords 010000-01FFFF 08000-0FFFF SA2 64Kbytes 32Kwords 020000-02FFFF 10000-17FFF SA3 64Kbytes 32Kwords 030000-03FFFF ...

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MX29LV160T/B & MX29LV160AT/AB Table 2: MX29LV160B & MX29LV160AB SECTOR ARCHITECTURE Sector Sector Size Byte Mode Word Mode Byte Mode (x8) Word Mode (x16) A19 A18 A17 A16 A15 A14 A13 A12 SA0 16Kbytes 8Kwords SA1 8Kbytes 4Kwords SA2 8Kbytes 4Kwords ...

Page 5

MX29LV160T/B & MX29LV160AT/AB BLOCK DIAGRAM CONTROL CE OE INPUT WE LOGIC RESET ADDRESS LATCH A0-A19 AND BUFFER Q0-Q15/A-1 P/N:PM0866 PROGRAM/ERASE HIGH VOLTAGE FLASH ARRAY ARRAY SOURCE HV Y-PASS GATE PGM SENSE DATA AMPLIFIER HV PROGRAM DATA LATCH I/O BUFFER 5 ...

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MX29LV160T/B & MX29LV160AT/AB AUTOMATIC PROGRAMMING The MX29LV160T/B & MX29LV160AT/AB is byte/word programmable using the Automatic Programming algo- rithm. The Automatic Programming algorithm makes the external system do not need to have time out se- quence nor to verify the data ...

Page 7

MX29LV160T/B & MX29LV160AT/AB mand through the command register without requiring VID, as shown in table 5. To verify whether or not sector being protected, the sec- tor address must appear on the appropriate highest or- der address bit (see Table ...

Page 8

MX29LV160T/B & MX29LV160AT/AB QUERY COMMAND AND COMMON FLASH INTERFACE (CFI) MODE ( for MX29LV160AT/ AB) MX29LV160AT/AB is capable of operating in the CFI mode. This mode all the host system to determine the manufacturer of the device such as operating ...

Page 9

MX29LV160T/B & MX29LV160AT/AB Table 4-3. CFI Mode: Device Geometry Data Values (All values in these tables are in hexadecimal) Description N Device size (2 bytes) Flash device interface code (x8/x16 async.) Maximum number of bytes in multi-byte write (not supported) ...

Page 10

MX29LV160T/B & MX29LV160AT/AB COMMAND DEFINITIONS Device operations are selected by writing specific ad- dress and data sequences into the command register. Writing incorrect address and data values or writing them TABLE 5. MX29LV160T/B & MX29LV160AT/AB COMMAND DEFINITIONS First Bus Command ...

Page 11

MX29LV160T/B & MX29LV160AT/AB TABLE 6. MX29LV160T/B & MX29LV160AT/AB BUS OPERATION DESCRIPTION CE OE Read L L Write L H Reset X X Temporary sector unlock X X Output Disable L H Standby Vcc± X 0.3V Sector Protect L H Chip ...

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MX29LV160T/B & MX29LV160AT/AB REQUIREMENTS FOR READING ARRAY DATA To read array data from the outputs, the system must drive the CE and OE pins to VIL the power control and selects the device the output control ...

Page 13

MX29LV160T/B & MX29LV160AT/AB tion, the RY/BY pin remains a "0" (busy) until the inter- nal reset operation is complete, which requires a time of tREADY (during Embedded Algorithms). The system can thus monitor RY/BY to determine whether the reset op- ...

Page 14

MX29LV160T/B & MX29LV160AT/AB TABLE 7. SILICON ID CODE Pins A0 Manufacturer code Word VIL Byte VIL Device code Word VIH for MX29LV160(A)T Byte VIH Device code Word VIH for MX29LV160(A)B Byte VIH Sector Protection Word X Verification Byte X READING ...

Page 15

MX29LV160T/B & MX29LV160AT/AB SECTOR ERASE COMMANDS The device does not require the system to entirely pre- program prior to executing the Automatic Sector Erase Set-up command and Automatic Sector Erase com- mand. Upon executing the Automatic Sector Erase com- mand, ...

Page 16

MX29LV160T/B & MX29LV160AT/AB and data requirements for the byte program command sequence. When the Embedded Program algorithm is complete, the device then returns to reading array data and addresses are no longer latched. The system can determine the status of ...

Page 17

MX29LV160T/B & MX29LV160AT/AB Q6:Toggle BIT I Toggle Bit indicates whether an Automatic Pro- gram or Erase algorithm is in progress or complete, or whether the device has entered the Erase Suspend mode. Toggle Bit I may be ...

Page 18

MX29LV160T/B & MX29LV160AT/AB ceeded the specified limits (internal pulse count). Under these conditions Q5 will produce a "1". This time-out condition indicates that the program or erase cycle was not successfully completed. Data Polling and Toggle Bit are the only ...

Page 19

MX29LV160T/B & MX29LV160AT/AB Q3 Sector Erase Timer After the completion of the initial sector erase command sequence, the sector erase time-out will begin. Q3 will remain low until the time-out is complete. Data Polling and Toggle Bit are valid after ...

Page 20

MX29LV160T/B & MX29LV160AT/AB a logical "1" for the protected sector. The system must write the reset command to exit the "Silicon-ID Read Command" code. CHIP UNPROTECT The MX29LV160T/B & MX29LV160AT/AB also features the chip unprotect mode, so that ...

Page 21

MX29LV160T/B & MX29LV160AT/AB ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . ..... -65 Ambient Temperature with Power Applied ...

Page 22

MX29LV160T/B & MX29LV160AT/AB CAPACITANCE 1.0 MHz SYMBOL PARAMETER CIN1 Input Capacitance CIN2 Control Pin Capacitance COUT Output Capacitance Table 9. DC CHARACTERISTICS TA = -40 Symbol PARAMETER ILI Input Leakage Current ILIT A9 ...

Page 23

MX29LV160T/B & MX29LV160AT/AB AC CHARACTERISTICS TA = -40 Table 10. READ OPERATIONS Symbol PARAMETER tRC Read Cycle Time (Note 1) tACC Address to Output Delay tCE CE to Output Delay tOE OE to Output Delay tDF OE High to Output ...

Page 24

MX29LV160T/B & MX29LV160AT/AB SWITCHING TEST CIRCUITS DEVICE UNDER TEST CL=100pF Including jig capacitance for MX29LV160(A)T/B-90 CL=30pF Including jig capacitance for MX29LV160(A)T/B-70 SWITCHING TEST WAVEFORMS 3. TESTING: Inputs are driven at 3.0V for a logic "1" and 0V for ...

Page 25

MX29LV160T/B & MX29LV160AT/AB Figure 1. READ TIMING WAVEFORMS VIH Addresses VIL VIH CE VIL VIH WE VIL VIH OE VIL HIGH Z VOH Outputs VOL VIH RESET VIL P/N:PM0866 tRC ADD Valid tACC tCE tOE tOEH tACC tOH DATA Valid ...

Page 26

MX29LV160T/B & MX29LV160AT/AB AC CHARACTERISTICS TA = -40 Table 11. Erase/Program Operations SYMBOL PARAMETER tWC Write Cycle Time (Note 1) tAS Address Setup Time tAH Address Hold Time tDS Data Setup Time tDH Data Hold Time tOES Output Enable Setup ...

Page 27

MX29LV160T/B & MX29LV160AT/AB AC CHARACTERISTICS TA = -40 Table 12. Alternate CE Controlled Erase/Program Operations SYMBOL PARAMETER tWC Write Cycle Time (Note 1) tAS Address Setup Time tAH Address Hold Time tDS Data Setup Time tDH Data Hold Time tOES ...

Page 28

MX29LV160T/B & MX29LV160AT/AB Figure 2. COMMAND WRITE TIMING WAVEFORM VCC 3V VIH Addresses VIL tAS VIH WE VIL tOES CE VIH VIL tCS OE VIH VIL VIH Data VIL P/N:PM0866 ADD Valid tAH tWP tCWC tCH tDS tDH DIN 28 ...

Page 29

MX29LV160T/B & MX29LV160AT/AB AUTOMATIC PROGRAMMING TIMING WAVEFORM One byte data is programmed. Verify in fast algorithm and additional verification by external control are not re- quired because these operations are executed automati- cally by internal control circuit. Programming comple- tion ...

Page 30

MX29LV160T/B & MX29LV160AT/AB Figure 4. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART Increment Address P/N:PM0866 START Write Data AAH Write Data 55H Write Data A0H Write Program Data/Address Data Poll from system No Verify Data Ok ? YES No Last Address ? YES ...

Page 31

MX29LV160T/B & MX29LV160AT/AB Figure 5. CE CONTROLLED WRITE TIMING WAVEFORM 555 for program 2AA for erase Address tWC tWH WE tGHEL OE tCP CE tWS tDS Data tRH RESET RY/BY NOTES: 1.PA=Program Address, PD=Program Data, DOUT=Data Out, Q7=complement of data ...

Page 32

MX29LV160T/B & MX29LV160AT/AB AUTOMATIC CHIP ERASE TIMING WAVEFORM All data in chip are erased. External erase verification is not required because data is verified automatically by internal control circuit. Erasure completion can be veri- fied by DATA polling or toggle ...

Page 33

MX29LV160T/B & MX29LV160AT/AB Figure 7. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART P/N:PM0866 START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 10H ...

Page 34

MX29LV160T/B & MX29LV160AT/AB AUTOMATIC SECTOR ERASE TIMING WAVEFORM Sector indicated by A12 to A19 are erased. External erase verify is not required because data are verified automatically by internal control circuit. Erasure comple- tion can be verified by DATA polling ...

Page 35

MX29LV160T/B & MX29LV160AT/AB Figure 9. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART P/N:PM0866 START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 30H ...

Page 36

MX29LV160T/B & MX29LV160AT/AB Figure 10. ERASE SUSPEND/ERASE RESUME FLOWCHART Note: It's only for a certain condition of MX29LV160T/B. If the system implements an endless erase suspend/resume loop, or the number of erase suspend/resume is exceeded 1024 times, then the 10ms ...

Page 37

MX29LV160T/B & MX29LV160AT/AB Figure 11. IN-SYSTEM SECTOR PROTECT/CHIP UNPROTECT TIMING WAVEFORM (RESET Control) VID VIH RESET SA, A6 A1, A0 Sector Protect or Sector Unprotect Data 60h 1us Note: When sector protect, A6=0, A1=1, A0=0. When chip ...

Page 38

MX29LV160T/B & MX29LV160AT/AB Figure 12. SECTOR PROTECT TIMING WAVEFORM (A9, OE Control 12V 5V A9 tVLHT 12V 5V OE tVLHT WE tOESP CE Data A19-A12 Notes: tVLHT (Voltage transition time)=4us min. tOESP (OE setup time to WE active)=4us ...

Page 39

MX29LV160T/B & MX29LV160AT/AB Figure 13. SECTOR PROTECTION ALGORITHM (A9, OE Control) No PLSCNT=32? Yes Device Failed P/N:PM0866 START Set Up Sector Addr PLSCNT=1 OE=VID,A9=VID,CE=VIL A6=VIL Activate WE Pulse Time Out 150us Set WE=VIH, CE=OE=VIL A9 should remain VID Read from ...

Page 40

MX29LV160T/B & MX29LV160AT/AB Figure 14. IN-SYSTEM SECTOR PROTECTION ALGORITHM WITH RESET=VID Increment PLSCNT No PLSCNT=25? Yes Device failed P/N:PM0866 START PLSCNT=1 RESET=VID Wait 1us No Temporary Sector First Write Unprotect Mode Cycle=60H Yes Set up sector address Write 60H to ...

Page 41

MX29LV160T/B & MX29LV160AT/AB Figure 15. IN-SYSTEM CHIP UNPROTECTION ALGORITHM WITH RESET=VID Increment PLSCNT No PLSCNT=1000? Yes Device failed P/N:PM0866 START PLSCNT=1 RESET=VID Wait 1us No First Write Cycle=60H ? Yes No All sector Protect all sectors protected? Yes Set up ...

Page 42

MX29LV160T/B & MX29LV160AT/AB Figure 16. TIMING WAVEFORM FOR CHIP UNPROTECTION (A9, OE Control) A1 12V Vcc 3V A9 tVLHT A6 12V Vcc 3V OE tVLHT WE CE Data A19-A12 P/N:PM0866 tWPP 2 tOESP 42 Verify tVLHT 00H F0H tOE Sector ...

Page 43

MX29LV160T/B & MX29LV160AT/AB Figure 17. CHIP UNPROTECTION ALGORITHM (A9, OE Control) Increment Sector Addr * It is recommended before unprotect whole chip, all sectors should be protected in advance. P/N:PM0866 START Protect All Sectors PLSCNT=1 Set OE=A9=VID CE=VIL,A6=1 Activate WE ...

Page 44

MX29LV160T/B & MX29LV160AT/AB WRITE OPERATION STATUS Figure 18. DATA POLLING ALGORITHM No NOTE : 1.VA=Valid address for programming or erasure. 2.Q7 should be re-checked even Q5="1" because Q7 may change simultaneously with Q5. P/N:PM0866 Start Read Q7~Q0 Add.=VA(1) Yes Q7 ...

Page 45

MX29LV160T/B & MX29LV160AT/AB Figure 19. TOGGLE BIT ALGORITHM NO Program/Erase Operation Not Complete,Write Note:1.Read toggle bit twice to determine whether or not it is toggling. 2. Recheck toggle bit because it may stop toggling as Q5 change to "1". P/N:PM0866 ...

Page 46

MX29LV160T/B & MX29LV160AT/AB Figure 20. Data Polling Timings (During Automatic Algorithms) tRC Address VA tACC tCE CE tCH tOE OE tOEH WE DQ7 Q0-Q6 tBUSY RY/BY NOTES: VA=Valid address. Figure shows are first status cycle after command sequence, last status ...

Page 47

MX29LV160T/B & MX29LV160AT/AB Figure 21. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) tRC Address VA tACC tCE CE tCH OE tOEH WE High Z Q6/Q2 tBUSY RY/BY NOTES: VA=Valid address; not required for Q6. Figure shows first two status cycle ...

Page 48

MX29LV160T/B & MX29LV160AT/AB Table 13. AC CHARACTERISTICS Parameter Std Description tREADY1 RESET PIN Low (During Automatic Algorithms) to Read or Write (See Note) tREADY2 RESET PIN Low (NOT During Automatic Algorithms) to Read or Write (See Note) tRP RESET Pulse ...

Page 49

MX29LV160T/B & MX29LV160AT/AB AC CHARACTERISTICS WORD/BYTE CONFIGURATION (BYTE) Parameter Description JEDEC Std tELFL/tELFH CE to BYTE Switching Low or High tFLQZ BYTE Switching Low to Output HIGH Z tFHQV BYTE Switching High to Output Active Figure 23. BYTE TIMING WAVEFORM ...

Page 50

MX29LV160T/B & MX29LV160AT/AB Figure 24. BYTE TIMING WAVEFORM FOR READ OPERATIONS (BYTE switching from word mode to byte mode BYTE Q0~Q14 Q15/A-1 Figure 25. BYTE TIMING WAVEFORM FOR PROGRAM OPERATIONS CE WE BYTE P/N:PM0866 tELFH DOUT (Q0-Q14) DOUT ...

Page 51

MX29LV160T/B & MX29LV160AT/AB Table 14. TEMPORARY SECTOR UNPROTECT Parameter Std. Description tVIDR VID Rise and Fall Time (See Note) tRSP RESET Setup Time for Temporary Sector Unprotect Note: Not 100% tested Figure 26. TEMPORARY SECTOR UNPROTECT TIMING DIAGRAM 12V RESET ...

Page 52

MX29LV160T/B & MX29LV160AT/AB Figure 28. TEMPORARY SECTOR UNPROTECT ALGORITHM Temporary Sector Unprotect Completed(Note 2) Note : 1. All protected sectors are temporary unprotected. P/N:PM0866 Start RESET = VID (Note 1) Perform Erase or Program Operation Operation Completed RESET = VIH ...

Page 53

MX29LV160T/B & MX29LV160AT/AB Figure 29. ID CODE READ TIMING WAVEFORM VCC 3V VID ADD VIH A9 VIL VIH ADD A0 VIL tACC VIH A1 VIL ADD VIH A2-A8 A10-A19 VIL CE VIH VIL VIH WE VIL VIH OE VIL VIH ...

Page 54

MX29LV160T/B & MX29LV160AT/AB ERASE AND PROGRAMMING PERFORMANCE (1) PARAMETER Sector Erase Time Chip Erase Time Byte Programming Time Word Programming Time Chip Programming Time Byte Mode Word Mode Erase/Program Cycles Note: 1. Not 100% Tested, Excludes external system level over ...

Page 55

... MX29LV160T/B & MX29LV160AT/AB ORDERING INFORMATION PART NO. ACCESS TIME (ns) MX29LV160TMC-70 70 MX29LV160BMC-70 70 MX29LV160TMC-90 90 MX29LV160BMC-90 90 MX29LV160TTC-70 70 MX29LV160BTC-70 70 MX29LV160TTC-90 90 MX29LV160BTC-90 90 MX29LV160TTI-70 70 MX29LV160BTI-70 70 MX29LV160TTI-90 90 MX29LV160BTI-90 90 MX29LV160TXBC-70 70 MX29LV160BXBC-70 70 MX29LV160TXBC-90 90 MX29LV160BXBC-90 90 MX29LV160TXBI-70 70 MX29LV160BXBI-70 70 MX29LV160TXBI-90 90 MX29LV160BXBI-90 90 MX29LV160ATTC-70 70 MX29LV160ABTC-70 70 MX29LV160ATTC-90 90 MX29LV160ABTC-90 90 P/N:PM0866 OPERATING CURRENT STANDBY CURRENT MAX.(mA) MAX.(uA PACKAGE 5 44 Pin SOP ...

Page 56

MX29LV160T/B & MX29LV160AT/AB PART NO. ACCESS TIME (ns) MX29LV160ATTI-70 70 MX29LV160ABTI-70 70 MX29LV160ATTI-90 90 MX29LV160ABTI-90 90 MX29LV160ATXBC-70 70 MX29LV160ABXBC-70 70 MX29LV160ATXEC-70 70 MX29LV160ABXEC-70 70 MX29LV160ATXBC-90 90 MX29LV160ABXBC-90 90 MX29LV160ATXEC-90 90 MX29LV160ABXEC-90 90 MX29LV160ATXBI-70 70 MX29LV160ABXBI-70 70 MX29LV160ATXEI-70 70 MX29LV160ABXEI-70 70 ...

Page 57

MX29LV160T/B & MX29LV160AT/AB PART NO. Access Time Operating Current Standby Current (ns) MX29LV160ATTC-70G 70 MX29LV160ABTC-70G 70 MX29LV160ATTC-90G 90 MX29LV160ABTC-90G 90 MX29LV160ATTI-70G 70 MX29LV160ABTI-70G 70 MX29LV160ATTI-90G 90 MX29LV160ABTI-90G 90 MX29LV160ATXBC-70G 70 MX29LV160ABXBC-70G 70 MX29LV160ATXEC-70G 70 MX29LV160ABXEC-70G 70 MX29LV160ATXBC-90G 90 MX29LV160ABXBC-90G 90 ...

Page 58

MX29LV160T/B & MX29LV160AT/AB PACKAGE INFORMATION P/N:PM0866 58 REV. 3.7, APR. 23, 2003 ...

Page 59

... MX29LV160T/B & MX29LV160AT/AB 44-PIN PLASTIC SOP (MX29LV160TMC/BMC) P/N:PM0866 59 REV. 3.7, APR. 23, 2003 ...

Page 60

MX29LV160T/B & MX29LV160AT/AB 48-Ball CSP (for MX29LV160ATXBC/ATXBI/ABXBC/ABXBI) P/N:PM0866 60 REV. 3.7, APR. 23, 2003 ...

Page 61

MX29LV160T/B & MX29LV160AT/AB 48-Ball CSP (for MX29LV160TXBC/TXBI/BXBC/BXBI) P/N:PM0866 61 REV. 3.7, APR. 23, 2003 ...

Page 62

MX29LV160T/B & MX29LV160AT/AB 48-Ball CSP (for MX29LV160ATXEC/ATXEI/ABXEC/ABXEI) P/N:PM0866 62 REV. 3.7, APR. 23, 2003 ...

Page 63

MX29LV160T/B & MX29LV160AT/AB REVISION HISTORY Revision No. Description (MX29LV160AT/AB) 0.1 Mis-typing:Table 4-3 Device Gemetry Data Values 1) Device size: Data=0015h 2) Erase block region 1 information: Data=0000h for byte address=5A, Word address=2D Data=0040h for byte address=5E, Word address=2F Data=0000h for ...

Page 64

MX29LV160T/B & MX29LV160AT/AB Rev. No. Description 2.4 Change tBUSY spec. from 90ns to 90us 2.5 Correct typing error tWPP1/tWPP2 was changed to 100ns To modify Package Information 2.6 Separate the tBUSY spec: tBUSY:90us for sector erase tBUSY:90ns for chip erase ...

Page 65

MX29LV160T/B & MX29LV160AT/AB Rev. No. Description 3 added pb-free part no. to order information 3.7 1. Corrected typing error 2. Improved chip erase time from 25(typ.) to 15(typ.)/30(max.) P/N:PM0866 Page P57 P22 P54 65 Date MAR/26/2003 APR/23/2003 REV. ...

Page 66

... FAX:+81-44-246-9105 SINGAPORE OFFICE: TEL:+65-348-8385 FAX:+65-348-8096 TAIPEI OFFICE: TEL:+886-2-2509-3300 FAX:+886-2-2509-2200 ACRONIX MERICA, NC. TEL:+1-408-453-8088 FAX:+1-408-453-8488 CHICAGO OFFICE: TEL:+1-847-963-1900 FAX:+1-847-963-1909 http : //www.macronix.com C L O., TD. MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. ...

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