MX29LV160BBTC-70 Macronix International Co., MX29LV160BBTC-70 Datasheet

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MX29LV160BBTC-70

Manufacturer Part Number
MX29LV160BBTC-70
Description
Manufacturer
Macronix International Co.
Datasheet

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MX29LV160BBTC-70
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MXIC
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MX29LV160BBTC-70
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MX
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FEATURES
• Extended single - supply voltage range 2.7V to 3.6V
• 2,097,152 x 8/1,048,576 x 16 switchable
• Single power supply operation
• Fully compatible with MX29LV160A device
• Fast access time: 55/70ns
• Low power consumption
• Command register architecture
• Auto Erase (chip & sector) and Auto Program
• Erase Suspend/Erase Resume
• Status Reply
GENERAL DESCRIPTION
The MX29LV160BT/BB is a 16-mega bit Flash memory
organized as 2M bytes of 8 bits or 1M words of 16 bits.
MXIC's Flash memories offer the most cost-effective
and reliable read/write non-volatile random access
memory. The MX29LV160BT/BB is packaged in 44-pin
SOP, 48-pin TSOP and 48-ball CSP. It is designed to be
reprogrammed and erased in system or in standard
EPROM programmers.
The standard MX29LV160BT/BB offers access time as
fast as 55ns, allowing operation of high-speed micropro-
cessors without wait states. To eliminate bus conten-
tion, the MX29LV160BT/BB has separate chip enable
(CE) and output enable (OE) controls.
MXIC's Flash memories augment EPROM functionality
with in-circuit electrical erasure and programming. The
MX29LV160BT/BB uses a command register to man-
age this functionality. The command register allows for
P/N:PM1041
- 3.0V only operation for read, erase and program
operation
- 30mA maximum active current
- 0.2uA typical standby current
- Byte/word Programming (9us/11us typical)
- Sector Erase (Sector structure 16K-Bytex1,
8K-Bytex2, 32K-Bytex1, and 64K-Byte x31)
- Automatically erase any combination of sectors with
Erase Suspend capability.
- Automatically program and verify data at specified
address
- Suspends sector erase operation to read data from,
or program data to, any sector that is not being erased,
then resumes the erase.
- Data polling & Toggle bit for detection of program and
16M-BIT [2Mx8/1Mx16] CMOS SINGLE VOLTAGE
1
• Ready/Busy pin (RY/BY)
• Sector protection
• CFI (Common Flash Interface) compliant
• 100,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1V to VCC+1V
• Boot Sector Architecture
• Low VCC write inhibit is equal to or less than 1.4V
• Package type:
• Compatibility with JEDEC standard
100% TTL level control inputs and fixed power supply
levels during erase and programming, while maintaining
maximum EPROM compatibility.
MXIC Flash technology reliably stores memory contents
even after 100,000 erase and program cycles. The MXIC
cell is designed to optimize the erase and programming
mechanisms. In addition, the combination of advanced
tunnel oxide processing and low internal electric fields
for erase and program operations produces reliable cy-
cling. The MX29LV160BT/BB uses a 2.7V~3.6V VCC
supply to perform the High Reliability Erase and auto
Program/Erase algorithms.
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up pro-
tection is proved for stresses up to 100 milliamps on
address and data pin from -1V to VCC + 1V.
MX29LV160BT/BB
erase operation completion.
- Provides a hardware method of detecting program or
erase operation completion.
- Hardware method to disable any combination of
sectors from program or erase operations
- Temporary sector unprotect allows code changes in
previously locked sectors.
- Flash device parameters stored on the device and
provide the host system to access
- T = Top Boot Sector
- B = Bottom Boot Sector
- 44-pin SOP
- 48-pin TSOP
- 48-ball CSP
- Pinout and software compatible with single-power
supply Flash
ADVANCED INFORMATION
3V ONLY FLASH MEMORY
REV. 0.0, NOV. 18, 2003

Related parts for MX29LV160BBTC-70

MX29LV160BBTC-70 Summary of contents

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FEATURES • Extended single - supply voltage range 2.7V to 3.6V • 2,097,152 x 8/1,048,576 x 16 switchable • Single power supply operation - 3.0V only operation for read, erase and program operation • Fully compatible with MX29LV160A device • ...

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PIN CONFIGURATIONS 44 SOP(500 mil RESET 43 A19 2 A18 A17 A10 A11 A12 A13 A14 A2 ...

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BLOCK STRUCTURE Table 1: MX29LV160BT SECTOR ARCHITECTURE Sector Sector Size Byte Mode Word Mode Byte Mode(x8) SA0 64Kbytes 32Kwords 000000-00FFFF 00000-07FFF SA1 64Kbytes 32Kwords 010000-01FFFF 08000-0FFFF SA2 64Kbytes 32Kwords 020000-02FFFF 10000-17FFF SA3 64Kbytes 32Kwords 030000-03FFFF 18000-1FFFF SA4 64Kbytes 32Kwords 040000-04FFFF ...

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Table 2: MX29LV160BB SECTOR ARCHITECTURE Sector Sector Size Byte Mode Word Mode Byte Mode (x8) Word Mode (x16) A19 A18 A17 A16 A15 A14 A13 A12 SA0 16Kbytes 8Kwords SA1 8Kbytes 4Kwords SA2 8Kbytes 4Kwords SA3 32Kbytes 16Kwords 008000-00FFFF 04000-07FFF ...

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BLOCK DIAGRAM CONTROL CE OE INPUT WE LOGIC RESET ADDRESS LATCH A0-A19 AND BUFFER Q0-Q15/A-1 P/N:PM1041 MX29LV160BT/BB PROGRAM/ERASE HIGH VOLTAGE FLASH ARRAY ARRAY SOURCE HV Y-PASS GATE PGM SENSE DATA AMPLIFIER HV PROGRAM DATA LATCH I/O BUFFER 5 WRITE STATE ...

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AUTOMATIC PROGRAMMING The MX29LV160BT/BB is byte/word programmable us- ing the Automatic Programming algorithm. The Auto- matic Programming algorithm makes the external sys- tem do not need to have time out sequence nor to verify the data programmed. The typical chip ...

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Table 1 and Table 2). The rest of address bits, as shown in Table 3, are don't care. Once all necessary bits have been set as required, the pro- gramming equipment may read the corresponding iden- ...

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QUERY COMMAND AND COMMON FLASH INTERFACE (CFI) MODE MX29LV160BT/BB is capable of operating in the CFI mode. This mode all the host system to determine the manufacturer of the device such as operating param- eters and configuration. Two commands are ...

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Table 4-3. CFI Mode: Device Geometry Data Values (All values in these tables are in hexadecimal) Description N Device size (2 bytes) Flash device interface code (x8/x16 async.) Maximum number of bytes in multi-byte write (not supported) Number of erase ...

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COMMAND DEFINITIONS Device operations are selected by writing specific ad- dress and data sequences into the command register. Writing incorrect address and data values or writing them TABLE 5. MX29LV160BT/BB COMMAND DEFINITIONS First Bus Command Bus Cycle Cycle Addr Reset ...

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TABLE 6. MX29LV160BT/BB BUS OPERATION DESCRIPTION CE OE Read L L Write L H Reset X X Temporary sector unlock X X Output Disable L H Standby Vcc± X 0.3V Sector Protect L H Chip Unprotect L H Sector Protection ...

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REQUIREMENTS FOR READING ARRAY DATA To read array data from the outputs, the system must drive the CE and OE pins to VIL the power control and selects the device the output control and gates array ...

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RY/BY pin remains a "0" (busy) until the inter- nal reset operation is complete, which requires a time of tREADY (during Embedded Algorithms). The system can thus monitor RY/BY to determine whether the reset op- eration is complete. ...

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TABLE 7. SILICON ID CODE Pins A0 Manufacturer code Word VIL Byte VIL Device code Word VIH for MX29LV160BT Byte VIH Device code Word VIH for MX29LV160BB Byte VIH Sector Protection Word X Verification Byte X READING ARRAY DATA The ...

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SECTOR ERASE COMMANDS The device does not require the system to entirely pre- program prior to executing the Automatic Sector Erase Set-up command and Automatic Sector Erase com- mand. Upon executing the Automatic Sector Erase com- mand, the device will ...

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When the Embedded Program algorithm is complete, the device then returns to reading array data and addresses are no longer latched. The system can determine the status of the program operation ...

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Q6:Toggle BIT I Toggle Bit indicates whether an Automatic Pro- gram or Erase algorithm is in progress or complete, or whether the device has entered the Erase Suspend mode. Toggle Bit I may be read at any ...

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Under these conditions Q5 will produce a "1". This time-out condition indicates that the program or erase cycle was not successfully completed. Data Polling and Toggle Bit are the only operating functions of ...

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Q3 Sector Erase Timer After the completion of the initial sector erase command sequence, the sector erase time-out will begin. Q3 will remain low until the time-out is complete. Data Polling and Toggle Bit are valid after the initial sector ...

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The system must write the reset command to exit the "Silicon-ID Read Command" code. CHIP UNPROTECT The MX29LV160BT/BB also features the chip unprotect mode, so that all sectors are unprotected after chip unprotect is completed to incorporate any changes in ...

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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . ..... -65 Ambient Temperature with Power Applied .... ...

Page 22

CAPACITANCE 1.0 MHz SYMBOL PARAMETER CIN1 Input Capacitance CIN2 Control Pin Capacitance COUT Output Capacitance Table 9. DC CHARACTERISTICS TA = -40 Symbol PARAMETER ILI Input Leakage Current ILIT A9 Input Leakage Current ...

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AC CHARACTERISTICS TA = -40 for 29LV160BT/BB-55R) Table 10. READ OPERATIONS Symbol PARAMETER tRC Read Cycle Time (Note 1) tACC Address to Output Delay tCE CE to Output Delay tOE OE to Output Delay tDF OE High to Output Float ...

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SWITCHING TEST CIRCUITS DEVICE UNDER TEST SWITCHING TEST WAVEFORMS 3. TESTING: Inputs are driven at 3.0V for a logic "1" and 0V for a logic "0". Input pulse rise and fall times are < 5ns. P/N:PM1041 MX29LV160BT/BB CL ...

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Figure 1. READ TIMING WAVEFORMS VIH Addresses VIL VIH CE VIL VIH WE VIL VIH OE VIL HIGH Z VOH Outputs VOL VIH RESET VIL P/N:PM1041 MX29LV160BT/BB tRC ADD Valid tACC tCE tOE tOEH tACC tOH DATA Valid 25 tDF ...

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AC CHARACTERISTICS TA = -40 ( Table 11. Erase/Program Operations SYMBOL PARAMETER tWC Write Cycle Time (Note 1) tAS Address Setup Time tAH Address Hold Time tDS Data Setup Time tDH Data Hold Time tOES Output Enable Setup ...

Page 27

AC CHARACTERISTICS TA = -40 ( Table 12. Alternate CE Controlled Erase/Program Operations SYMBOL PARAMETER tWC Write Cycle Time (Note 1) tAS Address Setup Time tAH Address Hold Time tDS Data Setup Time tDH Data Hold Time tOES ...

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Figure 2. COMMAND WRITE TIMING WAVEFORM VCC 3V VIH Addresses VIL tAS VIH WE VIL tOES CE VIH VIL tCS OE VIH VIL VIH Data VIL P/N:PM1041 MX29LV160BT/BB ADD Valid tAH tWP tCWC tCH tDS tDH DIN 28 tWPH REV. ...

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AUTOMATIC PROGRAMMING TIMING WAVEFORM One byte data is programmed. Verify in fast algorithm and additional verification by external control are not re- quired because these operations are executed automati- cally by internal control circuit. Programming comple- tion can be verified ...

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Figure 4. AUTOMATIC PROGRAMMING ALGORITHM FLOWCHART Increment Address P/N:PM1041 MX29LV160BT/BB START Write Data AAH Write Data 55H Write Data A0H Write Program Data/Address Data Poll from system No Verify Data Ok ? YES No Last Address ? YES Auto Program ...

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Figure 5. CE CONTROLLED WRITE TIMING WAVEFORM 555 for program 2AA for erase Address tWC tWH WE tGHEL OE tCP CE tWS tDS Data tRH RESET RY/BY NOTES: 1.PA=Program Address, PD=Program Data, DOUT=Data Out, Q7=complement of data written to device. ...

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AUTOMATIC CHIP ERASE TIMING WAVEFORM All data in chip are erased. External erase verification is not required because data is verified automatically by internal control circuit. Erasure completion can be veri- fied by DATA polling or toggle bit checking after ...

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Figure 7. AUTOMATIC CHIP ERASE ALGORITHM FLOWCHART P/N:PM1041 MX29LV160BT/BB START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 10H Address 555H ...

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AUTOMATIC SECTOR ERASE TIMING WAVEFORM Sector indicated by A12 to A19 are erased. External erase verify is not required because data are verified automatically by internal control circuit. Erasure comple- tion can be verified by DATA polling or toggle bit ...

Page 35

Figure 9. AUTOMATIC SECTOR ERASE ALGORITHM FLOWCHART P/N:PM1041 MX29LV160BT/BB START Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 80H Address 555H Write Data AAH Address 555H Write Data 55H Address 2AAH Write Data 30H Sector Address ...

Page 36

Figure 10. ERASE SUSPEND/ERASE RESUME FLOWCHART P/N:PM1041 MX29LV160BT/BB START Write Data B0H ERASE SUSPEND NO Toggle Bit checking Q6 not toggled YES Read Array or Program Reading or NO Programming End YES Write Data 30H Delay 10ms (note) ERASE RESUME ...

Page 37

Figure 11. IN-SYSTEM SECTOR PROTECT/CHIP UNPROTECT TIMING WAVEFORM (RESET Control) VID VIH RESET SA, A6 A1, A0 Sector Protect or Sector Unprotect Data 60h 1us Note: When sector protect, A6=0, A1=1, A0=0. When chip unprotect, A6=1, A1=1, ...

Page 38

Figure 12. SECTOR PROTECT TIMING WAVEFORM (A9, OE Control 12V 5V A9 tVLHT 12V 5V OE tVLHT WE tOESP CE Data A19-A12 Notes: tVLHT (Voltage transition time)=4us min. tOESP (OE setup time to WE active)=4us min. P/N:PM1041 MX29LV160BT/BB ...

Page 39

Figure 13. SECTOR PROTECTION ALGORITHM (A9, OE Control) No PLSCNT=32? Yes Device Failed P/N:PM1041 MX29LV160BT/BB START Set Up Sector Addr PLSCNT=1 OE=VID,A9=VID,CE=VIL A6=VIL Activate WE Pulse Time Out 150us Set WE=VIH, CE=OE=VIL A9 should remain VID Read from Sector Addr=SA, ...

Page 40

Figure 14. IN-SYSTEM SECTOR PROTECTION ALGORITHM WITH RESET=VID Increment PLSCNT No PLSCNT=25? Yes Device failed P/N:PM1041 MX29LV160BT/BB START PLSCNT=1 RESET=VID Wait 1us No Temporary Sector First Write Unprotect Mode Cycle=60H Yes Set up sector address Write 60H to sector address ...

Page 41

Figure 15. IN-SYSTEM CHIP UNPROTECTION ALGORITHM WITH RESET=VID Increment PLSCNT No PLSCNT=1000? Yes Device failed P/N:PM1041 MX29LV160BT/BB START PLSCNT=1 RESET=VID Wait 1us No First Write Cycle=60H ? Yes No All sector Protect all sectors protected? Yes Set up first sector ...

Page 42

Figure 16. TIMING WAVEFORM FOR CHIP UNPROTECTION (A9, OE Control) A1 12V Vcc 3V A9 tVLHT A6 12V Vcc 3V OE tVLHT WE CE Data A19-A12 P/N:PM1041 MX29LV160BT/BB tWPP 2 tOESP 42 Verify tVLHT 00H F0H tOE Sector Address REV. ...

Page 43

Figure 17. CHIP UNPROTECTION ALGORITHM (A9, OE Control) Increment Sector Addr * It is recommended before unprotect whole chip, all sectors should be protected in advance. P/N:PM1041 MX29LV160BT/BB START Protect All Sectors PLSCNT=1 Set OE=A9=VID CE=VIL,A6=1 Activate WE Pulse Time ...

Page 44

WRITE OPERATION STATUS Figure 18. DATA POLLING ALGORITHM No NOTE : 1.VA=Valid address for programming or erasure. 2.Q7 should be re-checked even Q5="1" because Q7 may change simultaneously with Q5. P/N:PM1041 MX29LV160BT/BB Start Read Q7~Q0 Add.=VA(1) Yes Q7 = Data ...

Page 45

Figure 19. TOGGLE BIT ALGORITHM NO Program/Erase Operation Not Complete,Write Note:1.Read toggle bit twice to determine whether or not it is toggling. 2. Recheck toggle bit because it may stop toggling as Q5 change to "1". P/N:PM1041 MX29LV160BT/BB Start Read ...

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Figure 20. Data Polling Timings (During Automatic Algorithms) tRC Address VA tACC tCE CE tCH tOE OE tOEH WE DQ7 Q0-Q6 tBUSY RY/BY NOTES: VA=Valid address. Figure shows are first status cycle after command sequence, last status read cycle, and ...

Page 47

Figure 21. TOGGLE BIT TIMING WAVEFORMS (DURING AUTOMATIC ALGORITHMS) tRC Address VA tACC tCE CE tCH OE tOEH WE High Z Q6/Q2 tBUSY RY/BY NOTES: VA=Valid address; not required for Q6. Figure shows first two status cycle after command sequence, ...

Page 48

Table 13. AC CHARACTERISTICS Parameter Std Description tREADY1 RESET PIN Low (During Automatic Algorithms) to Read or Write (See Note) tREADY2 RESET PIN Low (NOT During Automatic Algorithms) to Read or Write (See Note) tRP RESET Pulse Width (During Automatic ...

Page 49

AC CHARACTERISTICS WORD/BYTE CONFIGURATION (BYTE) Parameter Description JEDEC Std tELFL/tELFH CE to BYTE Switching Low or High tFLQZ BYTE Switching Low to Output HIGH Z tFHQV BYTE Switching High to Output Active Figure 23. BYTE TIMING WAVEFORM FOR READ OPERATIONS ...

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Figure 24. BYTE TIMING WAVEFORM FOR READ OPERATIONS (BYTE switching from word mode to byte mode BYTE Q0~Q14 Q15/A-1 Figure 25. BYTE TIMING WAVEFORM FOR PROGRAM OPERATIONS CE WE BYTE P/N:PM1041 MX29LV160BT/BB tELFH DOUT (Q0-Q14) DOUT VA (Q15) ...

Page 51

Table 14. TEMPORARY SECTOR UNPROTECT Parameter Std. Description tVIDR VID Rise and Fall Time (See Note) tRSP RESET Setup Time for Temporary Sector Unprotect Note: Not 100% tested Figure 26. TEMPORARY SECTOR UNPROTECT TIMING DIAGRAM 12V RESET 0 or Vcc ...

Page 52

Figure 28. TEMPORARY SECTOR UNPROTECT ALGORITHM Temporary Sector Unprotect Completed(Note 2) Note : 1. All protected sectors are temporary unprotected. P/N:PM1041 MX29LV160BT/BB Start RESET = VID (Note 1) Perform Erase or Program Operation Operation Completed RESET = VIH VID=11.5V~12.5V 2. ...

Page 53

Figure 29. ID CODE READ TIMING WAVEFORM VCC 3V VID ADD VIH A9 VIL VIH ADD A0 VIL tACC VIH A1 VIL ADD VIH A2-A8 A10-A19 VIL CE VIH VIL VIH WE VIL VIH OE VIL VIH DATA Q0-Q15 VIL ...

Page 54

ERASE AND PROGRAMMING PERFORMANCE (1) PARAMETER Sector Erase Time Chip Erase Time Byte Programming Time Word Programming Time Chip Programming Time Byte Mode Word Mode Erase/Program Cycles Note: 1. Not 100% Tested, Excludes external system level over head. 2. Typical ...

Page 55

... ORDERING INFORMATION PART NO. ACCESS TIME (ns) MX29LV160BTMC-55R 55 MX29LV160BBMC-55R 55 MX29LV160BTMC-70 70 MX29LV160BBMC-70 70 MX29LV160BTTC-55R 55 MX29LV160BBTC-55R 55 MX29LV160BTTC-70 70 MX29LV160BBTC-70 70 MX29LV160BTTI-70 70 MX29LV160BBTI-70 70 MX29LV160BTXBC-55R 55 MX29LV160BBXBC-55R 55 MX29LV160BTXBC-70 70 MX29LV160BBXBC-70 70 MX29LV160BTXBI-70 70 MX29LV160BBXBI-70 70 MX29LV160BTXEC-55R 55 MX29LV160BBXEC-55R 55 MX29LV160BTXEC-70 70 MX29LV160BBXEC-70 70 MX29LV160BTXEI-70 70 MX29LV160BBXEI-70 70 P/N:PM1041 MX29LV160BT/BB OPERATING CURRENT STANDBY CURRENT MAX.(mA) MAX.(uA PACKAGE 5 44 Pin SOP 5 44 Pin SOP ...

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PACKAGE INFORMATION P/N:PM1041 MX29LV160BT/BB 56 REV. 0.0, NOV. 18, 2003 ...

Page 57

P/N:PM1041 MX29LV160BT/BB 57 REV. 0.0, NOV. 18, 2003 ...

Page 58

CSP (for MX29LV160BTXBC/BTXBI/BBXBC/BBXBI) P/N:PM1041 MX29LV160BT/BB 58 REV. 0.0, NOV. 18, 2003 ...

Page 59

CSP (for MX29LV160BTXEC/BTXEI/BBXEC/BBXEI) P/N:PM1041 MX29LV160BT/BB 59 REV. 0.0, NOV. 18, 2003 ...

Page 60

... FAX:+81-44-246-9105 SINGAPORE OFFICE: TEL:+65-348-8385 FAX:+65-348-8096 TAIPEI OFFICE: TEL:+886-2-2509-3300 FAX:+886-2-2509-2200 ACRONIX MERICA, NC. TEL:+1-408-453-8088 FAX:+1-408-453-8488 CHICAGO OFFICE: TEL:+1-847-963-1900 FAX:+1-847-963-1909 http : //www.macronix.com MX29LV160BT/ O., TD. MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. ...

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