22153AKHC Cadeka Microcircuits LLC., 22153AKHC Datasheet
22153AKHC
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22153AKHC Summary of contents
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TMC22x5yA Multistandard Digital Video Decoder Three-Line Adaptive Comb Decoder Family, 8 & 10 bit Features • Very high performance, low cost • Adaptive comb-based decoding • Multiple pin-compatible versions - 3-line, 2-line, and band-split - 8- and 10-bit processing • ...
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TMC22x5yA Table of Contents Features ......................................................................1 Applications ...............................................................1 Description .................................................................1 Block Diagram ............................................................1 Contents .....................................................................2 List of Tables and Figures ........................................3 General Description ...................................................4 Input Processor...............................................................4 Adaptive Comb Filter.....................................................4 Output Processor ............................................................5 Parallel and Serial Microprocessor Interfaces................5 Pin Assignments ........................................................5 ...
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PRODUCT SPECIFICATION List of Tables and Figures Table 1. TMC22x5yA Decoder Family ................. 4 Table 2. Normalized Subcarrier Frequency as a Function of Pixel Data Rates....... 45 Table 3. Comb Filter Architecture ..................... 48 Table 4. Simple Example of an ...
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TMC22x5yA General Description The TMC22x5yA digital decoder can be used as a universal input to digital video processing systems by decoding digital composite video and transcoding digital component inputs into a common data format. The digital comb filter decoder implements ...
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PRODUCT SPECIFICATION assumed to be luminance and the high frequency portion is processed as chrominance to find the magnitude and phase of the chrominance vector. These three components are then compared across the (0H & 1H) and (1H & 2H) ...
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TMC22x5yA Pin Descriptions Pin Name Pin Number Value Inputs VIDEOA 86, 85, 84, 83, 9-0 82, 81, 80, 79, 78, 77 VIDEOB 75, 74, 73, 72, 9-0 71, 70, 69, 68, 67, 66 VSYNC 49 HSYNC 48 MASTER 88, 87 ...
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PRODUCT SPECIFICATION Pin Descriptions (cont.) Pin Name Pin Number Value DREF 30 TTL FID 33, 32, 31 TTL 2-0 P Interface D 45, 44, 43, 42, TTL 7-0 41, 38, 37 63, 62 TTL 1 TTL ...
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TMC22x5yA Control Register Map The TMC22x5yA is initialized and controlled by a set of registers which determine the operating modes. An external controller is employed to write and read the Control Registers through either the 8-bit parallel or 2-line serial ...
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PRODUCT SPECIFICATION Reg Bit Name 0D 7-6 CEST Chroma error signal transform 0D 5 CESG Chroma error signal gain 0D 4 YESG Luma error signal gain 0D 3 CESTBY Chroma error signal bypass 0D 2 XFEN XLUT filter enable 0D ...
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TMC22x5yA Reg Bit Name 2D 2 YOFF1 Y offset, msb 8 2D 1-0 SG1 Msync gain, 2 msbs 7-0 2E 7-1 SYSPH1 7 lsbs of phase 6-0 VAXIS1 axis flip SYSPH1 2F 7-0 8 msbs of phase ...
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PRODUCT SPECIFICATION Control Register Definitions Global Control Register (00 SRST HRST Reg Bit Name 00 7 SRST 00 6 HRST 00 5-3 SET 00 2 DHVEN 00 1-0 STD REV. 1.0.0 2/4/ SET Description Software ...
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TMC22x5yA Control Register Definitions Input Processor Control (01 Reserved IPMUX IP8B Reg Bit Name 01 7 Reserved 01 6 IPMUX 01 5 IP8B 01 4 TDEN 01 3 TBLK 01 2 IPCMSB 01 1 ABMUX 01 0 CKSEL ...
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PRODUCT SPECIFICATION Control Register Definitions Burst Loop Control (02 BLLRST VIPEN Reg Bit Name 02 7 BLLRST 02 6 VIPEN 02 5-4 LOCK 02 3 BLM 02 2 KILD 02 1 DMODBY 02 0 CINT REV. 1.0.0 ...
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TMC22x5yA Control Register Definitions Chroma Processor Control (03 BLFS Reg Bit Name 03 7-5 BLFS 03 4 CCEN 03 3-2 CCOR 03 1 GAUBY 03 0 GAUSEL 14 (continued CCEN CCOR Description Burst loop filter ...
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PRODUCT SPECIFICATION Control Register Definitions Burst Threshold (04 Reg Bit Name 04 7-0 BTH Pedestal (05 Reg Bit Name 05 7-0 PED Luma Processor Control (06 Reserved ANEN Reg Bit Name ...
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TMC22x5yA Control Register Definitions Comb Processor Control (07 LS1BY LS1IN LS2DLY Reg Bit Name 07 7 LS1BY 07 6 LS1IN 07 5 LS2DLY 07 4 SPLIT 07 3 BSFBY 07 2 BSFSEL 07 1 BSFMSB 07 0 GRSDLY ...
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PRODUCT SPECIFICATION Control Register Definitions Extended DRS (09 PCKF Reg Bit Name 09 7-4 PCKF 09 3-0 VSTD REV. 1.0.0 2/4/03 (continued Description Clock rate. PCKF Function 0000 13.50 MHz 0001 reserved 0010 reserved 0011 ...
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TMC22x5yA Control Register Definitions Output Control (0A OP8B OPLMT OPLMT Reg Bit Name 0A 7 OP8B 0A 6-5 OPLMT 0A 4-3 MSEN 0A 2 OPCMSB 0A 1 YBAL 0A 0 BUREN Notes enable “super blacks” and ...
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PRODUCT SPECIFICATION Control Register Definitions Output Control (0B FMT422 CDEC YUVT Reg Bit Name 0B 7 FMT422 0B 6 CDEC 0B 5 YUVT 0B 4-2 Reserved 0B 1 DRSEN 0B 0 DRSCK REV. 1.0.0 2/4/03 (continued) 4 ...
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TMC22x5yA Control Register Definitions Comb Filter Control (0C ADAPT YCES Reg Bit Name 0C 7-6 ADAPT 0C 5 YCES 0C 4 YCSEL 0C 3-0 COMB 20 (continued YCSEL Description Adaption mode. Sets the 3-line comb ...
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PRODUCT SPECIFICATION Control Register Definitions Comb Filter Control (0D CEST CESG Reg Bit Name 0D 7-6 CEST 0D 5 CESG 0D 4 YESG 0D 3 CESTBY 0D 2 XFEN 0D 1 FAST 0D 0 YWBY REV. 1.0.0 ...
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TMC22x5yA Control Register Definitions Comb Filter Control (0E XIP Reg Bit Name 0E 7-6 XIP 0E 5-4 XSF 0E 3-2 YMUX 0E 1-0 CMUX 22 (continued XSF YMUX Description XLUT input select. Selects the comb ...
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PRODUCT SPECIFICATION Control Register Definitions Comb Filter Control (0F Reserved CAT Reg Bit Name Description 0F 7 Reserved Reserved, set to zero. 0F 6-5 CAT Adaption threshold. Fixes threshold at which different comb filters are selected. 0F ...
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TMC22x5yA Control Register Definitions Sync Pulse Generator (11 Reg Bit Name 11 7-0 STB Sync Pulse Generator (12 Reg Bit Name 12 7-0 BTV Sync Pulse Generator (13 Reg ...
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PRODUCT SPECIFICATION Control Register Definitions Sync Pulse Generator (15 Reserved Reg Bit Name 15 7 Reserved 15 6-2 VINDO 15 1 VDIV 15 0 VDOV Sync Pulse Generator (16 Reserved Reg Bit Name 16 ...
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TMC22x5yA Control Register Definitions Buffered register set 0 (17) Active when BUFFER pin set LOW SG0 SG0 SG0 7 6 Reg Bit Name 17 7-0 SG0 7-0 Buffered register set 0 (18) Active when BUFFER pin set LOW. ...
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PRODUCT SPECIFICATION Control Register Definitions Buffered register set 0 (1C) Active when BUFFER pin set LOW YOFF0 YOFF0 YOFF0 7 6 Reg Bit Name 1C 7-0 YOFF0 7-0 Buffered register set 0 (1D) Active when BUFFER pin ...
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TMC22x5yA Control Register Definitions Normalized Subcarrier Frequency (21 FSC FSC FSC 11 10 Reg Bit Name 21 7-0 FSC 11-4 Normalized Subcarrier Frequency (22 FSC FSC FSC 19 18 Reg Bit Name 22 7-0 FSC 19-12 ...
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PRODUCT SPECIFICATION Control Register Definitions Normalized Subcarrier Frequency (24 CLMPEN PFLTEN Reg Bit Name 24 7 DREFSEL 24 6 PFLTBY 24 5-4 CLPSEL 1 VCLPEN 24 2-0 BAND 2-0 Normalized Subcarrier Frequency (25 ...
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TMC22x5yA Control Register Definitions Output Format Control (26 Reserved LDVIO Reg Bit Name 26 7-6 Reserved 26 5 LDVIO 26 4 OPCKS 26 3 DPCEN 26 2-0 DPC Buffered register set 1 (27) Active when BUFFER pin set ...
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PRODUCT SPECIFICATION Control Register Definitions Buffered register set 1 (29) Active when BUFFER pin set HIGH UG1 UG1 UG1 7 6 Reg Bit Name 29 7-0 UG1 7-0 Buffered register set 1 (2A) Active when BUFFER pin ...
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TMC22x5yA Control Register Definitions Buffered register set 1 (2D) Active when BUFFER pin set HIGH Reserved Reg Bit Name 2D 7-3 Reserved 2D 2 YOFF1 8 2D 1-0 SG1 9,8 Buffered register set 1 (2E) Active when BUFFER ...
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PRODUCT SPECIFICATION Control Register Definitions Video Measurement (30 Reserved LGF LGEN Reg Bit Name 30 7 Reserved 30 6 LGF 30 5 LGEN 30 4 LGEXT 30 3 Reserved 30 2 PGG 30 1 PGEN 30 0 ...
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TMC22x5yA Control Register Definitions Video Measurement (33 Reserved Reg Bit Name 33 7 Reserved 33 6 2-0 PG 10-8 Registers 34-3C are Read-Only Register (34 ...
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PRODUCT SPECIFICATION Control Register Definitions Register (38 Reg Bit Name 38 7-0 Y 9-2 Register (39 Reg Bit Name 39 7-0 M 9-2 Register ...
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TMC22x5yA Control Register Definitions Test Control (3D-3E Reg Bit Name 3D-3E 7-0 TEST Test Control (3F VBIT20 PEDDIS CCDEN Reg Bit Name 3F 7 VBIT20 3F 6 PEDDIS 3F 5 CCDEN CCDEN 4 ...
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PRODUCT SPECIFICATION Control Register Definitions Status - Read Only (41 LINEST BGST VACT2 Reg Bit Name 41 7 LINEST 41 6 BGST 41 5 VACT2 41 4 PALODD 41 3 VFLY 41 2 FGRAB 41 1 LGRAB ...
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TMC22x5yA Control Register Definitions Status - Read Only (44 MONO Reg Bit Name 44 7 MONO 44 6-0 FPERR Status - Read Only (45 Reg Bit Name 45 7-0 DRS Status - Read Only (46) 7 ...
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PRODUCT SPECIFICATION Control Register Definitions Status - Read Only (48-4A Status - Read Only (4B PKILL CFSTAT Reg Bit Name 4B 7 PKILL 4B 6-5 CFSTAT 4B 4-0 XOP Status - Read Only (4C-FF) ...
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TMC22x5yA Decoder Introduction All composite video decoders perform fundamentally the same operation. The first stage is to separate the luminance and chrominance. The second stage is to lock the internally generated sine and cosine waveforms to the burst on the ...
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PRODUCT SPECIFICATION Notch Filter Amplitude Chrominance (dB) Subcarrier 0 -3 Luminance Chrominance (& High Frequency Luminance) -20 F Figure 5. Examples of Notch and Bandpass Filters centered at the subcarrier frequency produces the chroma signal. This simple technique works well ...
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TMC22x5yA phase relationship to the chroma on 1H. Therefore normally 0H and 2H are added together to produce the average luma across 3 lines and this is then subtracted from 1H to produce the combed chroma. FIELD LINE no PAL ...
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PRODUCT SPECIFICATION The TMC22x5yA Comb Filter Architecture The TMC22x5yA, when implementing a line based comb filter, has a core architecture as shown in Figure 10. The con- cept of the complementary bandsplit filter is also observed in the complementary comb ...
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TMC22x5yA TMC22x5yA Functional Description Input Processor The input processor selects between the two external video sources on VIDEO A and VIDEO B. If the TRS stripper or GRS stacker is active, then the user must select the input with either ...
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PRODUCT SPECIFICATION 0 -10 -20 Bandsplit Filter 2 -30 -40 Bandsplit Filter 1 -50 -60 -70 Normalized Frequency Figure 13. Bandsplit Filter, Full Frequency Response Table 2. Normalized Subcarrier Frequency as a Function of Pixel Data Rates F SC Pixel ...
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TMC22x5yA Primary LPF Input BSFSEL 2:1 MUX Secondary Input LS1IN The primary and secondary inputs are selected within the input processor. The primary input is normally the undelayed composite video signal in line, field, and frame based comb filters or ...
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PRODUCT SPECIFICATION Adaptive Comb Filter The IPCF[1:0] register bits select the inputs to the adaptive comb filter, this would normally be xHH for chroma combs, xHF for luma combs, and xHL if the luminance signal was to be sampled dropped ...
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TMC22x5yA The comb filter architecture performs chrominance or lumi- nance comb filtering on PAL or NTSC video signals, by implementing one of sixteen independent chroma and luma comb filter algorithms. The highest level of the adaptive comb filter configuration is ...
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PRODUCT SPECIFICATION In either of these methods, the “K” signal can be used to cross fade between the YCOMB and the SIMPLE bandsplit signals. The resulting comb filter equation can be expressed as: + Combed Luma = Simple (K * ...
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TMC22x5yA Generation of the Comb Fail Signals Luma Error Signals The signals from the 3 low pass filters, 0HL, 1HL, and 2HL are subtracted from one another to produce an error signal proportional to the luma comb fail. The resulting ...
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PRODUCT SPECIFICATION ADAPT[1:0] UYE LYE Comb UPE Fail LPE Logic UME LME STA[3:0] mix signal, K. For 3-line Y/C comb filters, an external 1H delay is required in the uncombed channel to compensate for the comb filter delay. This principle ...
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TMC22x5yA YERR XLUT X[7:0] Input PERR Select MERR XIP[1:0] For PAL comb filters the LYE, LME, and LPE errors signals are always selected by default. In this way the error signals into the XLUT always represent the comb filter being ...
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PRODUCT SPECIFICATION . – Chrominance Burst Locked Loop Figure 21. Block Diagram of Digital Burst Locked Loop Digital Burst Locked Loop The digital burst locked loop provides sine and cosine signals which are phase locked to the incoming burst signal. ...
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TMC22x5yA Table 10. PAL-M Bruch Blanking Sequence Internal Burst Internal line # present frame # 258 Yes 259 Yes ...
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PRODUCT SPECIFICATION Output Processor – Y Data VIDEOB PED[7:0] LPF Clamp 256 Circuit 240 CLMP[1:0] VCLPEN X U Data UGx[10: Data VGx[10:0] Clamp Circuit A clamp pulse generated by the Burst Gate signal is used to grab either ...
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TMC22x5yA If either of the error signals indicates that the magnitude difference is above the programmed threshold ANEN is LOW, the adaptive notch filter is bypassed. The output of the adaptive notch filter is rounded ...
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PRODUCT SPECIFICATION Y Offset The 8 bit Y offset adds any offset required in the Y or RGB data outputs. For example 64 (16) for the 64 (16) to 940 (235) 10 bit (8 bit) 601 outputs. When the output ...
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TMC22x5yA Simple Luma Color Correction If the YBAL register bit is set HIGH, and the luma data reaches or exceeds the luma limits, there should data at that time; therefore the color data are set ...
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PRODUCT SPECIFICATION Sync Pulse Generator The vertical and horizontal references to the decoder can be from external VSYNC and HSYNC pulses, decoded from TRS and TRS-ID words, or from the internal sync separator which extracts the sync information from the ...
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TMC22x5yA DHSYNC are referenced to the input data (0HFLAT) and not the output of the LSTORE1, i.e. 1HFLAT. The duration of the DVSYNC signal is fixed to one line and the duration of the DHSYNC signal is 64 clock periods. ...
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PRODUCT SPECIFICATION Table 20. Table of Line Idents, LID[4:0] Line no: 260 & 261 262 263 - 307 308 309 310 311 312 Timing Parameters Subcarrier Programming The color subcarrier is produced by an internal 28 bit Direct Digital Synthesizer ...
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TMC22x5yA CLOCK t HSYNC VSYNC Figure 28. External HSYNC and VSYNC Timing for Field 1 ( Vertical Blanking 256 257 FIELDS 1 AND 3 258 259 260 UVV UVV HSYNC VSYNC FLD 258 259 ...
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PRODUCT SPECIFICATION 309 310 FIELDS 1 AND 5 311 312 0 UVV - HSYNC VSYNC FLD 308 309 FIELDS 2 AND 6 310 311 0 UVV - HSYNC VSYNC FLD 309 310 FIELDS 3 ...
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TMC22x5yA 258 259 260 261 262 UVV UVV HSYNC VSYNC FLD 258 259 260 261 UVV - HSYNC VSYNC FLD 258 259 260 261 262 UVV - HSYNC VSYNC FLD 259 257 ...
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PRODUCT SPECIFICATION VINDO Operation The VINDO circuit uses the line idents on LID blanking signals to control the comb filter output and the blanking of the YUV data in the output matrix during the vertical blanking period. The vertical window ...
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TMC22x5yA Table 23. Pixel Grab Control LGEXT PGEN PGEXT LGEN single pixel every 4 ...
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PRODUCT SPECIFICATION Examples: NTSC std with STS programmed to 858. Base pixels per quadrant = Int(858/4) = 214 Pixel 0: 1. Pixel 0 <= 4*Int(858/4) 2. Required pixel 0 < 214 therefore quadrant = 0, [PG[10:9] = 00] 3. PG[10:0] ...
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TMC22x5yA R/W ADR D 7-0 Figure 33. Microprocessor Parallel Port – Write Timing R/W ADR D 7-0 Figure 34. Microprocessor Parallel Port – Read Timing Serial Control Port (R-Bus) In addition to the 12-wire ...
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PRODUCT SPECIFICATION Table 25. Serial Port Addresses bit 7 bit 6 bit 5 bit 4 bit (MSB) ( ...
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TMC22x5yA • Block Pointer (01) • Base Address byte • Stop signal • Start signal • Slave Address byte (R/W bit = HIGH) • Data byte from base address • Stop signal Read from four consecutive control registers • Start ...
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PRODUCT SPECIFICATION Equivalent Circuits and Threshold Levels Digital Input GND Figure 38. Equivalent Digital Input Circuit SET or RESET Three-State Outputs REV. 1.0.0 2/4/ 27014B Figure 39. Equivalent Digital Output t DIS 0.5V 0.5V Figure 40. ...
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TMC22x5yA Absolute Maximum Ratings Parameter Power Supply voltage Digital Inputs Applied Voltage 3, 4 Forced current Digital Outputs 2 Applied voltage 3, 4 Forced current Short circuit duration (single output in HIGH state to ground) Analog Output Short circuit duration ...
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PRODUCT SPECIFICATION Operating Conditions Parameter V Power Supply Voltage DD V Input Voltage, Logic HIGH IH TTL Compatible Inputs Serial Port (SDA and SCL) V Input Voltage, Logic LOW IL TTL Compatible Inputs Serial Port (SDA and SCL) I Output ...
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TMC22x5yA Operating Conditions (continued) Parameter Pixel Interface (output) t CLOCK to DHSYNC and DVYSNC, AVOUT, and FID POD Time t CLOCK to data, Propagation Time POD t Int. or Ext. LDV to data, Propagation Time POD t Clock to DHSYNC ...
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PRODUCT SPECIFICATION Operating Conditions (continued) Parameter Parallel Microprocessor Interface t CS Pulse Width, LOW PWLCS t CS Pulse Width, HIGH PWHCS t Address Setup Time SA t Address Hold Time HA t Data Setup Time (write Data Hold ...
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TMC22x5yA Switching Characteristics Parameter t Output Delay low-Z DOZ t Output Hold Time high-Z HOM t Output Delay Data Valid DOM Note: Timing reference points are at the 50% level, digital output load <40pF. ...
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PRODUCT SPECIFICATION Programming Examples Standard: NTSC-M Mode: Line-Locked Input Format: 13.5 Composite Output Format: RGB (0-1023) Sync on Green Decoder: Adaptive 3-Line Chroma Comb Filter Register Map ...
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TMC22x5yA Programming Examples Standard: NTSC Mode: Line-Locked Input Format: 13.5 MHz Composite Video Output Format: YUV Decoder: Adaptive 3-Line Comb Register Map ...
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PRODUCT SPECIFICATION Programming Examples Standard: PAL Mode: Line-Locked Input Format: PAL-YC Output Format: Y, Cb, Cr (D1 Out) Decoder: Register Map: No Comb ...
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TMC22x5yA Programming Examples Standard: NTSC-M Mode: D1 Mode Input Format: D1 [Y] Multiplexed Data w/TRS B R Output Format Output DHSync + DVSync B R Decoder: Simple Transcoder Register Map ...
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PRODUCT SPECIFICATION Programming Worksheet Standard: Mode: Input Format: Output Format: Decoder: Register Map The DRS appears on the output at the Bandsplit Filter 0 -10 -20 Bandsplit Filter 2 -30 -40 Bandsplit Filter ...
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TMC22x5yA Notes 82 PRODUCT SPECIFICATION REV. 1.0.0 2/4/03 ...
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PRODUCT SPECIFICATION Mechanical Dimensions – 100 Lead MQFP Package Inches Millimeters Symbol Min. Max. Min. Max. A — .134 — 3.40 A1 .010 — .25 A2 .100 .120 2.55 3.05 .015 B .009 .23 C .005 .009 .13 D .904 ...
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... Simple 8 bit 100-Lead MQFP 2-Line Comb 8 bit 100-Lead MQFP 3-Line Comb 8 bit 100-Lead MQFP Simple 10 bit 100-Lead MQFP 2-Line Comb 10 bit 100-Lead MQFP 3-Line Comb 10 bit 100-Lead MQFP PRODUCT SPECIFICATION Package Package Marking 22051AKHC 22052AKHC 22053AKHC 22151AKHC 22152AKHC 22153AKHC 2/4/03 0.0m 001 Stock#DS7022x5yA ...