A416316S-40 AMIC Technology, Corp., A416316S-40 Datasheet

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A416316S-40

Manufacturer Part Number
A416316S-40
Description
64K x 16 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Manufacturer
AMIC Technology, Corp.
Datasheet
Document Title
Revision History
(October, 1998, Version 0.4)
64K X 16 CMOS DYNAMIC RAM WITH FAST PAGE MODE
Rev. No.
0.0
0.1
0.2
0.3
0.4
History
Initial issue
Modify 40/44L TSOP type II package outline drawing and
dimensions notes
Remove timing waveform of CAS -before- RAS refresh
counter test cycle
Final spec release
Erase t
Modify SOJ 40L outline dimensions
Modify TSOP 40/44L (type II) outline dimensions
CPT
64K X 16 CMOS DYNAMIC RAM WITH FAST PAGE MODE
parameter
Issue Date
March 06, 1998
June 17, 1998
August 21, 1998
September 8, 1998
October 23, 1998
AMIC Technology, Inc.
A416316
Remark
Preliminary
Final

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A416316S-40 Summary of contents

Page 1

X 16 CMOS DYNAMIC RAM WITH FAST PAGE MODE Document Title 64K X 16 CMOS DYNAMIC RAM WITH FAST PAGE MODE Revision History Rev. No. History 0.0 Initial issue 0.1 Modify 40/44L TSOP type II package outline drawing and ...

Page 2

X 16 CMOS DYNAMIC RAM WITH FAST PAGE MODE Features n Organization: 65,536 words X 16 bits n High speed - 40/50/60 ns RAS access time - 20/25/30 ns column address access time - 12/13/15 ns CAS access time ...

Page 3

Selection Guide Symbol t RAC Maximum RAS Access Time t Maximum Column Address Access Time AA t CAC Maximum CAS Access Time t OEA Maximum Output Enable ( OE ) Access Time t Minimum Read or Write Cycle Time RC ...

Page 4

Block Diagram VCC VSS A0 A1 RAS CLOCK RAS GENERATOR UCAS CLOCK A6 UCAS GENERATOR A7 LCAS CLOCK LCAS GENERATOR WE CLOCK GENERATOR WE OE CLOCK GENERATOR OE Recommended Operating Conditions Symbol Description VCC Supply Voltage ...

Page 5

Absolute Maximum Ratings* Input Voltage (Vin -1.0V to +7.0V Output Voltage (Vout ...

Page 6

AC Characteristics (VCC = 5V JEDEC Std # Symbol Symbol Random Read or Write RL2RL2 RC Cycle Time RH2RL2 RP RAS Precharge Time RL1RH1 RAS RAS Pulse Width ...

Page 7

Read Cycle (VCC = 5V 10%, VSS = 0V +70 C) JEDEC Std # Symbol Symbol RL1QV RAC Access Time from RAS CL1QV CAC Access Time from CAS 15 ...

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Write Cycle (VCC = 5V 10%, VSS = 0V +70 C) JEDEC Std # Symbol Symbol Column Address Setup Time AVWL2 ASC Column Address Hold Time 1CL1AX CAH 26 ...

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Fast Page Mode Cycle (VCC = 5V JEDEC Std # Symbol Symbol Read-Write Cycle Time AVAV PC t (Fast Page) WL2WL2 CH2CQV CPA Access Time from CAS Precharge CH2CL2 CP CAS ...

Page 10

Notes and I depend on cycle rate. CC1 CC3 CC4 CC6 2. I and I depend on output loading. Specified values are obtained with the output open. CC1 CC4 3. An initial pause ...

Page 11

Timing Waveform of Read Cycle RAS t CRP(9) UCAS LCAS t t ASR(10) RAH(11) Address Row Address WE OE I/O (October, 1998, Version 0.4) t RC(1) t RAS( RCD(5) RSH(7) t CSH( ASC(24) CAH(25 ...

Page 12

Timing Waveform of Early Write Cycle RAS t CRP(9) UCAS LCAS t RAD(6) t ASR(10) Address Row Address I/O (October, 1998, Version 0.4) t RC(1) t RAS(3) t CSH(8) t RSH(40 RCD(5) CAS(41) t AWR(26) ...

Page 13

Timing Waveform of Late Write Cycle RAS t CRP(9) UCAS LCAS t RAD( ASR(101) RAH(11) Address Row Address WE OE I/O (October, 1998, Version 0.4) t RC(1) t RAS(3) t CSH(8) t RSH(40 RCD(5) CAS(41) t ...

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Timing Waveform of Read-Modify-Write Cycle RAS t CRP(9) UCAS LCAS t RAD(6) t RAH(11) t ASR(10) Address Row Address WE OE I/O (October, 1998, Version 0.4) t RAS(3) t CSH(8) t RCD( AR(16) t RAL(20 ASC(24) ...

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Timing Waveform of Fast Page Mode Read Cycle RAS t t CRP(11) UCAS LCAS t RAD( ASR(10) RAH(11) Row Address t RCS(17 I/O (October, 1998, Version 0.4) t RASP(47 CSH( RCD(3) CAS(4) ...

Page 16

Timing Waveform of Fast Page Mode Early Write Cycle t RAH(11) RAS t CRP(9) UCAS LCAS t t ASR(10) Address Row address WE OE I/O (October, 1998, Version 0.4) t RASP(47) t ASC(24) t CSH( RCD(5) CAS(41) t ...

Page 17

Timing Waveform of Fast Page Mode Read-Modify-Write Cycle RAS t RCD(5) UCAS t RAD(6) LCAS t RAH(11) t ASR(10) t ASC(24) Address Row RCS (17 OEA(52 AA(15 RAC(13) t CAC(14) I/O ...

Page 18

Timing Waveform of Only Refresh Cycle RAS RAS UCAS LCAS Address Timing Waveform of -before- CAS t RAS tRPC(50) UCAS LCAS t OFF(23) I/O (October, 1998, Version 0.4) t RAS(3) t CRP( ASR(10) RAH(11) Row Address Refresh Cycle ...

Page 19

Timing Waveform of Hidden Refresh Cycle (Read) RAS t t CPR(9) RCD(5) UCAS LCAS t RAD(6) t RAH(11) t ASR(10) t ASC(24) Address Row t RCS(17 RAC(13 CAC(14) t CLZ(12) I/O (October, 1998, Version 0.4) ...

Page 20

Timing Waveform of Hidden Refresh Cycle (Write) RAS t CRP(9) UCAS LCAS t RAD(6) t RAH(11) t ASR(10) Row Address Address t WCS(27) WE I/O OE (October, 1998, Version 0.4) t RC(1) t RAS( RCD(5) RSH(40) t AR(16) ...

Page 21

... I/O - I/O I Ordering Codes Package\ RAS Access Time 40L SOJ (400 mil) 40/44L TSOP type II (400mil) (October, 1998, Version 0.4) 10%) Parameter Input Capacitance I/O Capacitance 40ns A416316S-40 A416316V-40 20 Max. Unit Test Conditions 5 pF Vin = Vin = Vin = Vout = 0V 50ns 60ns A416316S-50 ...

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Package Information SOJ 40L Outline Dimensions Seating Plane Symbol Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension e reference only. 4. ...

Page 23

Package Information TSOP 40/44L (Type II) Outline Dimensions Symbol Notes: 1. The maximum value of dimension D includes end flash. 2. Dimension E does not include resin fins. 3. Dimension S includes end flash. ...

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