AT32UC3A464S Atmel Corporation, AT32UC3A464S Datasheet - Page 76

• Manufacturer Part Number: AT32UC3A464S
• Manufacturer: Atmel Corporation

Specifications of AT32UC3A464S

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Usb Transceiver: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device + OTG
• Spi: 6
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Sd / Emmc: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: AES
• Sram (kbytes): 128
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8.3.1.18
8.3.1.19
8.3.1.20
76
AVR32
Data Read Address Exception
Data Write Address Exception
DTLB Read Miss Exception
The Data Read Address Error exception is generated if the address of a data memory read has
an illegal alignment.
The Data Write Address Error exception is generated if the address of a data memory write has
an illegal alignment.
The DTLB Read Miss exception is generated when no TLB entry matches the data memory
address of the current read operation, or if the Valid bit in a matching entry is 0.
*(--SP
*(--SP
TLBEAR = FAILING_VIRTUAL_ADDRESS;
TLBEHI[VPN] = FAILING_PAGE_NUMBER;
SR[R] = 0;
SR[J] = 0;
SR[M2:M0] = B’110;
SR[EM] = 1;
SR[GM] = 1;
PC = EVBA + 0x34;
*(--SP
*(--SP
TLBEAR = FAILING_VIRTUAL_ADDRESS;
TLBEHI[VPN] = FAILING_PAGE_NUMBER;
SR[R] = 0;
SR[J] = 0;
SR[M2:M0] = B’110;
SR[EM] = 1;
SR[GM] = 1;
PC = EVBA + 0x38;
*(--SP
*(--SP
TLBEAR = FAILING_VIRTUAL_ADDRESS;
TLBEHI[VPN] = FAILING_PAGE_NUMBER;
TLBEHI[I] = 0;
SR[R] = 0;
SR[J] = 0;
SR[M2:M0] = B’110;
SR[EM] = 1;
SR[GM] = 1;
PC = EVBA + 0x60;
SYS
SYS
SYS
SYS
SYS
SYS
) = PC;
) = SR;
) = PC;
) = SR;
) = PC;
) = SR;
32000D–04/2011