AT32UC3C2128C Atmel Corporation, AT32UC3C2128C Datasheet - Page 39
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AT32UC3C2128C
Manufacturer Part Number
AT32UC3C2128C
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(159 pages)
3.AT32UC3C0128C.pdf
(1313 pages)
4.AT32UC3C0128C.pdf
(108 pages)
Specifications of AT32UC3C2128C
Flash (kbytes)
128 Kbytes
Pin Count
64
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
45
Ext Interrupts
64
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
5
Twi (i2c)
2
Uart
4
Can
2
Lin
4
Ssc
1
Ethernet
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6 or 4.5 to 5.5
Operating Voltage (vcc)
3.0 to 3.6 or 4.5 to 5.5
Fpu
Yes
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
13
Input Capture Channels
6
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT32UC3C2128C-A2UR
Manufacturer:
ATMEL
Quantity:
1 043
Part Number:
AT32UC3C2128C-Z2UR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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- AT32UC3C0128C PDF datasheet #4
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- Download datasheet (5Mb)
5.2.2.1
5.2.2.2
32000D–04/2011
TLB Entry Register High Part - TLBEHI
TLB Entry Register Low Part - TLBELO
The contents of the TLBEHI and TLBELO registers is loaded into the TLB when the tlbw instruc-
tion is executed. The TLBEHI register consists of the following fields:
The contents of the TLBEHI and TLBELO registers is loaded into the TLB when the tlbw instruc-
tion is executed. None of the fields in TLBELO are altered by hardware. The TLBELO register
consists of the following fields:
• VPN - Virtual Page Number in the TLB entry. This field contains 22 bits, but the number of
• V - Valid. Set if the TLB entry is valid, cleared otherwise. This bit is written to 0 by a reset. If
• I - Instruction TLB. If set, the current TLBEHI and TLBELO entries should be written into the
• ASID - Application Space Identifier. The operating system allocates a unique ASID to each
• PFN - Physical Frame Number to which the VPN is mapped. This field contains 22 bits, but
• C - Cacheable. Set if the page is cacheable, cleared otherwise.
• G - Global bit used in the address comparison in the TLB lookup. If the MMU is operating in
• B - Bufferable. Set if the page is bufferable, cleared otherwise.
• AP - Access permissions specifying the privilege requirements to access the page. The
bits used depends on the page size. A page size of 1 kB requires 22 bits, while larger page
sizes require fewer bits. When preparing to write an entry into the TLB, the virtual page
number of the entry to write should be written into VPN. When an MMU-related exception
has occurred, the virtual page number of the failing address is written to VPN by hardware.
an access to a page which is marked as invalid is attempted, an TLB Miss exception is
raised. Valid is set automatically by hardware whenever an MMU exception occurs.
Instruction TLB. If cleared, the Data or Unified TLB should be addressed. The I bit is set by
hardware when an MMU-related exception occurs, indicating whether the error occurred in
the ITLB or the UTLB/DTLB.
process. This ASID is written into TLBEHI by the OS, and used in the TLB address match if
the MMU is running in Private Virtual Memory mode and the G bit of the TLB entry is cleared.
ASID is never changed by hardware.
the number of bits used depends on the page size. A page size of 1 kB requires 22 bits, while
larger page sizes require fewer bits. When preparing to write an entry into the TLB, the
physical frame number of the entry to write should be written into PFN.
the Private Virtual Memory mode and the G bit is set, the ASID won’t be used in the TLB
lookup.
following permissions can be set, see
Table 5-2 on page
40.
AVR32
39
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