AT32UC3C2256C Atmel Corporation, AT32UC3C2256C Datasheet - Page 322

• Manufacturer Part Number: AT32UC3C2256C
• Manufacturer: Atmel Corporation

Specifications of AT32UC3C2256C

• Flash (kbytes): 256 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 66 MHz
• Cpu: 32-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 45
• Ext Interrupts: 64
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 5
• Twi (i2c): 2
• Uart: 4
• Can: 2
• Lin: 4
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 12
• Adc Speed (ksps): 2000
• Analog Comparators: 2
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 12
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 68
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0 to 3.6 or 4.5 to 5.5
• Operating Voltage (vcc): 3.0 to 3.6 or 4.5 to 5.5
• Fpu: Yes
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 13
• Input Capture Channels: 6
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

322
AVR32
SATSUB.W – Saturated Subtract of Words
Architecture revision:
Architecture revision1 and higher.
Description
Performs a subtraction and stores the result in destination register. The result is saturated if a
two’s complement overflow occurs. If saturation occurs, the Q flag is set.
Operation:
I.
II.
Syntax:
I.
II.
Operands:
I.
II.
Status Flags:
Q
Opcode:
temp ← Rx - Ry;
temp ← Rs - SE(imm16));
Format I: OP1 = Rx, OP2 = Ry
Format II: OP1 = Rs, OP2 = SE(imm16)
if (OP1[31] ∧ ¬OP2[31] ∧ ¬temp[31]) ∨ (¬OP1[31] ∧ OP2[31] ∧ temp[31]) then
else
satsub.w Rd, Rx, Ry
satsub.w Rd, Rs, imm
{d, x, y} ∈ {0, 1, …, 15}
{d, s} ∈ {0, 1, …, 15}
imm ∈ {-32768, -32767, ..., 32767}
Format I: OP1 = Rx, OP2 = Ry
Format II: OP1 = Rs, OP2 = SE(imm16)
Q:
V:
N:
Z:
C:
if(OP1[31]==0) then
else
Rd ← temp
Q ← (OP1[31] ∧ ¬OP2[31] ∧ ¬temp[31]) ∨ (¬OP1[31] ∧ OP2[31] ∧ temp[31]) ∨
V ← (OP1[31] ∧ ¬OP2[31] ∧ ¬temp[31]) ∨ (¬OP1[31] ∧ OP2[31] ∧ temp[31])
N ← Rd[31]
Z ← (Rd[31:0] == 0)
C ← 0
Rd ← 0x7fffffff;
Rd ← 0x80000000;
32000D–04/2011