AT89LP2052 Atmel Corporation, AT89LP2052 Datasheet - Page 48

• Manufacturer Part Number: AT89LP2052
• Manufacturer: Atmel Corporation

Specifications of AT89LP2052

• Flash (kbytes): 2 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 15
• Spi: 1
• Uart: 1
• Sram (kbytes): 0.25
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 2
• Isp: SPI
• Watchdog: Yes

Figure 19-4. SPI Transfer Format with CPHA = 0
Note:
Figure 19-5. SPI Transfer Format with CPHA = 1
Note:
19.4
48
*Not defined but normally MSB of character just received
*Not defined but normally LSB of previously transmitted character
SPI Pin Configuration
(FOR REFERENCE)
AT89LP2052/LP4052
(FROM MASTER)
SCK (CPOL = 0)
SCK (CPOL = 1)
SS (TO SLAVE)
(FROM SLAVE)
SCK CYCLE #
MOSI
MISO
Before using the Serial Peripheral Interface the four SPI pins – SCK, MISO, MOSI and SS –
must be properly configured for the desired functionality. See
tions” on page
bidirectional or output, with P1.7 and P1.5 set to “1”. MISO should be input-only, or bidirectional
with P1.6 set to “1”. When the SPI is in Slave mode, SCK, MOSI and SS must be configured as
input-only, or as bidirectional with P1.7, P1.6 and P1.4 set to “1”. MISO should be set as bidirec-
tional or output, with P1.6 set to “1”. If all four pins are set as bidirectional and their respectively
port bits are all “1”, it is possible to switch between Master and Slave mode without reconfiguring
the pins.
*
MSB
MSB
1
23. When the SPI is in Master mode, SCK and MOSI must be configured as
2
6
6
3
5
5
4
4
4
5
3
3
6
2
2
Section 15.7 “Port Alternate Func-
7
1
1
8
LSB
LSB
3547J–MICRO–10/09