AT89LP213 Atmel Corporation, AT89LP213 Datasheet - Page 65

• Manufacturer Part Number: AT89LP213
• Manufacturer: Atmel Corporation

Specifications of AT89LP213

• Flash (kbytes): 2 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 14
• Spi: 1
• Sram (kbytes): 0.125
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 2
• Isp: SPI/OCD
• Watchdog: Yes

22.2
22.3
23. Programming the Flash Memory
3538E–MICRO–11/10
Software Breakpoints
Limitations of On-chip Debug
The AT89LP213/214 microcontroller includes a BREAK instruction for implementing program
memory breakpoints in software. A software breakpoint can be inserted manually by placing the
BREAK instruction in the program code. Some emulator systems may allow for automatic inser-
tion/deletion of software breakpoints. The Flash memory must be re-programmed each time a
software breakpoint is changed. Frequent insertions/deletions of software breakpoints will
reduce the data retention of the nonvolatile memory. Devices used for debugging purposes
should not be shipped to end customers. The BREAK instruction is treated as a two-cycle NOP
when OCD is disabled.
The AT89LP213/214 is a low-cost, low-pincount yet fully-featured microcontroller that multi-
plexes several functions on its limited I/O pins. Some device functionality must be sacrificed to
provide resources for On-chip Debugging. The On-chip Debug System has the following
limitations:
The Atmel AT89LP213/214 microcontroller features 2KB of on-chip In-System Programmable
Flash program memory. In-System Programming (ISP) allows programming and reprogramming
of the microcontroller positioned inside the end system. Using a simple 4-wire SPI interface, the
In-System programmer communicates serially with the AT89LP213/214 microcontroller, repro-
gramming all nonvolatile memories on the chip. In-System programming eliminates the need for
physical removal of the chips from the system. This will save time and money, both during devel-
opment in the lab, and when updating the software or parameters in the field. The ISP interface
of the AT89LP213/214 includes the following features:
• The Debug Clock pin (DCL) is physically located on that same pin as Port Pin P1.3 and the
• The Debug Data pin (DDA) is physically located on either the XTAL1/P3.2 or XTAL2/P3.3 pin.
• When using the Internal RC Oscillator during debug, DDA is located on the XTAL1/P3.2 pin.
• When using the External Clock during debug, DDA is located on the XTAL2/P3.3 pin and the
• The AT89LP213/214 does not support In-Application Programming and therefore the device
• When using the watchdog to generate a break, the state of the watchdog will not be reset. An
• Four Wire SPI Programming Interface
• Active-low Reset Entry into Programming
• Slave Select allows multiple devices on same interface
• User Signature Array
External Reset (RST). Therefore, neither P1.3 nor an external reset source may be emulated
when OCD is enabled.
The crystal oscillator is therefore not supported during debug. The user must select either the
Internal RC Oscillator or the External Clock source to provide the system clock. Devices
fused for the crystal oscillator will default to external clock mode when OCD is enabled.
The INT0 function cannot be emulated in this mode.
system clock drives XTAL1/P3.2. The INT0, INT1 and CLKOUT functions cannot be emulated
in this mode.
must be reset before changing the program code during debugging. This includes the
insertion/deletion of software breakpoints.
OCD reset command should be sent to the device prior to resuming normal execution to
ensure correct watchdog behavior.
AT89LP213/214
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