AT89LP213 Atmel Corporation, AT89LP213 Datasheet - Page 66

• Manufacturer Part Number: AT89LP213
• Manufacturer: Atmel Corporation

Specifications of AT89LP213

• Flash (kbytes): 2 Kbytes
• Max. Operating Frequency: 20 MHz
• Cpu: 8051-1C
• Max I/o Pins: 14
• Spi: 1
• Sram (kbytes): 0.125
• Operating Voltage (vcc): 2.4 to 5.5
• Timers: 2
• Isp: SPI/OCD
• Watchdog: Yes

23.1
66
Physical Interface
AT89LP213/214
For more detailed information on In-System Programming, refer to the Application Note entitled
“AT89LP In-System Programming Specification”.
In-System Programming utilizes the Serial Peripheral Interface (SPI) pins of an AT89LP213/214
microcontroller. The SPI is a full duplex synchronous serial interface consisting of four wires:
Serial Clock (SCK), Master-In/Slave-out (MISO), Master-out/Slave-in (MOSI), and an active-low
Slave Select (SS). When programming an AT89LP213/214 device, the programmer always
operates as the SPI master, and the target system always operates as the SPI slave. To enter or
remain in In-System Programming mode the device’s reset line (RST) must be held active (low).
With the addition of VCC and GND, an AT89LP213/214 microcontroller can be programmed with
a minimum of seven connections as shown in
Figure 23-1. In-System Programming Device Connections
The In-System Programming Interface is the only means of externally programming the
AT89LP213/214 microcontroller. The ISP Interface can be used to program the device both in-
system and in a stand-alone serial programmer. The ISP Interface does not require any clock
other than SCK and is not limited by the system clock frequency. During In-System program-
ming the system clock source of the target device can operate normally.
When designing a system where In-System Programming will be used, the following observa-
tions must be considered for correct operation:
• Flexible Page Programming
• Row Erase Capability
• Page Write with Auto-Erase Commands
• Programming Status Register
• The ISP interface uses the SPI clock mode 0 (CPOL = 0,CPHA = 0) exclusively with a
• The AT89LP213/214 will enter programming mode only when its reset line (RST) is
• The RST input may be disabled to gain an extra I/O pin. In these cases the RST pin will
maximum frequency of 5 MHz.
active (low). To simplify this operation, it is recommended that the target reset can be
controlled by the In-System programmer. To avoid problems, the In-System programmer
should be able to keep the entire target system reset for the duration of the programming
cycle. The target system should never attempt to drive the four SPI lines while reset is active.
always function as a reset during power up. To enter programming the RST pin must be
Serial Clock
Serial Out
Serial In
SS
P1.7/SCK
P1.6/MISO
P1.5/MOSI
P1.4/SS
GND
AT89LP213/214
Figure
23-1.
P1.3/RST
VCC
RST
3538E–MICRO–11/10