AT90USB162 Atmel Corporation, AT90USB162 Datasheet - Page 190

• Manufacturer Part Number: AT90USB162
• Manufacturer: Atmel Corporation

Specifications of AT90USB162

• Flash (kbytes): 16 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 22
• Ext Interrupts: 21
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 5
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

19.5
19.5.1
19.5.2
19.5.3
19.6
190
Power modes
Memory management
AT90USB82/162
Idle mode
Power down
Freeze clock
In this mode, the CPU core is halted (CPU clock stopped). The Idle mode is taken wether the
USB controller is running or not. The CPU can wake up on any USB interrupts.
In this mode, the oscillator is stopped and halts all the clocks (CPU and peripherals). The USB
controller “wakes up” when:
The firmware has the ability to reduce the power consumption by setting the FRZCLK bit, which
freeze the clock of USB controller. When FRZCLK is set, it is still possible to access to the fol-
lowing registers:
Moreover, when FRZCLK is set, only the asynchronous interrupt may be triggered :
The controller does only support the following memory allocation management.
The reservation of an Endpoint can only be made in the increasing order (Endpoint 0 to the last
Endpoint). The firmware shall thus configure them in the same order.
The reservation of an Endpoint “k
cates the memory and insert it between the Endpoints “k
memory “slides” up and its data is lost. Note that the “k
slide.
Clearing an Endpoint enable (EPEN) does not clear either its ALLOC bit, or its configuration
(EPSIZE/PSIZE, EPBK/PBK). To free its memory, the firmware should clear ALLOC. Then, the
“k
memory does not slide.
The following figure illustrates the allocation and reorganization of the USB memory in a typical
example:
• the WAKEUPI interrupt is triggered (single asynchronous interrupt)
• USBCON,
• DPRAM direct access registers (DPADD7:0, UEDATX)
• UDCON (detach, ...)
• UDINT
• UDIEN
• WAKEUPI
i+1
” Endpoint memory automatically “slides” down. Note that the “k
i
” is done when its ALLOC bit is set. Then, the hardware allo-
i+2
” and upper Endpoint memory does not
i-1
” and “k
i+1
i+2
”. The “k
” and upper Endpoint
7707F–AVR–11/10
i+1
” Endpoint